SN74ALVCH162835DLR Datasheets | Logic - Universal Bus Functions Universal Bus Driver 18-Bit 56-SSOP
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SN74ALVCH162835DLR, SN74ALVCH162835DLR Datasheet,SN74ALVCH162835DLR PDF,Texas Instruments
Descriptions
IC UNIV BUS DVR 18BIT 56SSOP:Heisener Electronics
This 18-bit universal bus driver is designed for 1.65-V to 3.6-V VCC operation. Data flow from A to Y is controlled by the output-enable (OE)\ input. The device operates in the transparent mode when the latch-enable (LE) input is high. When LE is low, the A data is latched if the clock (CLK) input is held at a high or low logic level. If LE is low, the A data is stored in the latch/flip-flop on the low-to-high transition of CLK. When OE\ is high, the outputs are in the high-impedance state. The output port includes equivalent 26- series resistors to reduce overshoot and undershoot. To ensure the high-impedance state during power up or power down, OE\ should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level. The SN74ALVCH162835 is characterized for operation from 40C to 85C.:Texas Instruments