Home  Logic - Buffers, Drivers, Receivers, Transceivers  SN74ALS29854DWRE4 Datasheets | Logic - Buffers, Drivers, Receivers, Transceivers Transceiver, Inverting 1 Element 8 Bit per Element 3-State Output 24-SOIC

SN74ALS29854DWRE4 Datasheets | Logic - Buffers, Drivers, Receivers, Transceivers Transceiver, Inverting 1 Element 8 Bit per Element 3-State Output 24-SOIC

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SN74ALS29854DWRE4
Manufacturer Part#: SN74ALS29854DWRE4
Product Category: Logic - Buffers, Drivers, Receivers, Transceivers
Stock: On Order
Manufacturer: Texas Instruments
Description: Transceiver, Inverting 1 Element 8 Bit per Element 3-State Output 24-SOIC
Datasheet: SN74ALS29854
Package: 24-SOIC (0.295", 7.50mm Width)
Minimum: 1
Quantity: On Order

CAD Models

Product Attributes

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Series: 74ALS
Logic Type: Transceiver Inverting
Number of Elements: 1
Number of Bits per Element: 8
Input Type: -
Output Type: 3-State
Current - Output High Low: 24mA 48mA
Voltage - Supply: 4.75V ~ 5.25V
Operating Temperature: 0°C ~ 70°C (TA)
Mounting Type: Surface Mount
Package / Case: 24-SOIC (0.295" 7.50mm Width)
Supplier Device Package: 24-SOIC
Mfr: Texas Instruments
Package: Tape & Reel (TR)
Base Product Number: SN74ALS2
Product Status: Obsolete
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Descriptions

IC TRANSCVR 8-9BIT INVERT 24SOIC:Heisener Electronics
Transceiver Logic IC; No. of Pins:24; Operating Temperature Range:0°C to +70°C; Leaded Process Compatible:Yes; Logic Family:ALS; Package/Case:24-SOIC; Peak Reflow Compatible (260 C):Yes ;RoHS Compliant: Yes:Newark
The SN74ALS29854 is an 8-bit to 9-bit parity transceiver designed for two-way communication between data buses. When data is transmitted from the A bus to the B bus, a parity bit is generated. When data is transmitted from the B bus to the A bus with its corresponding parity bit, the parity-error () output indicates whether or not an error in the B data has occurred. The output-enable (, ) inputs can be used to disable the device so that the buses are effectively isolated. A 9-bit parity generator/checker generates a parity-odd (PARITY) output and monitors the parity of the I/O ports with an open-collector flag. can be either passed, sampled, stored, or cleared from the latch using the latch-enable () and clear () control inputs. When both OEA\ and OEB\ are low, data is transferred from the A bus to the B bus and inverted parity is generated. Inverted parity is a forced error condition that gives the designer more system diagnostic capability. The SN74ALS29854 is characterized for operation from 0°C to 70°C.:Texas Instruments

  • Features
  • Product Manufacturer

FEATURES

description

These data selectors/multiplexers contain inverters and drivers to supply full data selection to the four output gates. A separate strobe (G) input is provided. A 4-bit word is selected from one of two sources and is routed to the four outputs. The ′ALS157A and SN74AS157 present true data. The ′ALS158 and SN74AS158 present inverted data to minimize propagation delay time.

• Buffered Inputs and Outputs

• Package Options Include Plastic Small-Outline (D) Packages, Ceramic Chip Carriers (FK), and Standard Plastic (N) and Ceramic (J) 300-mil DIPs

Texas Instruments Incorporated (TI) is a global semiconductor design and manufacturing company that develops analog ICs and embedded processors. By employing the world's brightest minds, TI creates innovations that shape the future of technology. TI is helping more than 100,000 customers transform the future, today.

  • Environmental & Export Classifications
  • Documents & Media
Description Value
Description Value
RoHS Status: ROHS3 Compliant
Moisture Sensitivity Level (MSL): 1 (Unlimited)
REACH Status: REACH Unaffected
ECCN: EAR99
HTSUS: 8542.39.0001
Documents Media
Datasheets: SN74ALS29854
HTML Datasheet: SN74ALS29854
EDA / CAD Models: SN74ALS29854DWRE4 by Ultra Librarian

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