General description
The 74LVC373A consists of eight D-type transparent latches, featuring separate D-type inputs for each latch and 3-state true outputs for bus-oriented applications. A latch enable input (pin LE) and an output enable input (pin OE) are common to all internal latches.
Features and benefits
● 5 V tolerant inputs/outputs for interfacing with 5 V logic
● Wide supply voltage range from 1.2 V to 3.6 V
● CMOS low power consumption
● Direct interface with TTL levels
● High-impedance outputs when VCC = 0 V
● Complies with JEDEC standard:
◆ JESD8-7A (1.65 V to 1.95 V)
◆ JESD8-5A (2.3 V to 2.7 V)
◆ JESD8-C/JESD36 (2.7 V to 3.6 V)
● ESD protection:
◆ HBM JESD22-A114F exceeds 2000 V
◆ MM JESD22-A115-B exceeds 200 V
◆ CDM JESD22-C101E exceeds 1000 V
● Specified from -40℃ to +85℃ and -40℃ to +125℃