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Home  Logic - Counters, Dividers  74HC590BQ,115 Datasheets | Logic - Counters, Dividers Counter IC Binary Counter 1 Element 8 Bit Positive Edge 16-DHVQFN (2.5x3.5)

Mar 2 2021

74HC590BQ,115 Datasheets | Logic - Counters, Dividers Counter IC Binary Counter 1 Element 8 Bit Positive Edge 16-DHVQFN (2.5x3.5)

Product Overview

Image:
74HC590BQ-115
Manufacturer Part#: 74HC590BQ,115
Product Category: Logic - Counters, Dividers
Stock: No
Manufacturer: Nexperia USA Inc.
Description: Counter IC Binary Counter 1 Element 8 Bit Positive Edge 16-DHVQFN (2.5x3.5)
Datasheet: 74HC590PW,112 Datasheet
Package: 16-VFQFN Exposed Pad
Minimum: 1
Lead Time: 8 Weeks
Quantity: On Order
Send RFQ: Inquiry

Reference Price

Qty Unit Price Ext. Price
1: 0.67000 0.67000
10: 0.58900 5.89000
25: 0.55360 13.84000
100: 0.45190 45.19000
250: 0.41972 104.93000
500: 0.35720 178.60000
1000: 0.28576 285.76000
3000: 0.24547 736.41000
6000: 0.22854 1371.24000
15000: 0.22275 3341.25000

74HC590BQ,115 Images are for reference only.

74HC590BQ,115

CAD Models

Product Attributes

Series: 74HC
Part Status: Active
Logic Type: Binary Counter
Direction: Up
Number of Elements: 1
Number of Bits per Element: 8
Reset: Asynchronous
Timing: -
Count Rate: 61MHz
Trigger Type: Positive Edge
Voltage - Supply: 2V ~ 6V
Operating Temperature: -40°C ~ 125°C
Mounting Type: Surface Mount
Package / Case: 16-VFQFN Exposed Pad
Supplier Device Package: 16-DHVQFN (2.5x3.5)
Mfr: Nexperia USA Inc.
Package: Tape & Reel (TR)Cut Tape (CT)Digi-Reel®
Base Product Number: 74HC590

Descriptions

There is no relevant information available for this part yet.

FEATURES

General description

The 74HC590 is a high-speed Si-gate CMOS device and is pin compatible with Low power Schottky TTL (LSTTL). It is specified in compliance with JEDEC standard no. 7A.
The 74HC590 is an 8-bit binary counter with a storage register and 3-state outputs. The storage register has parallel (Q0 to Q7) outputs. The binary counter features a master reset counter (MRC) and count enable (CE) inputs. The counter and storage register have separate positive edge triggered clock (CPC and CPR) inputs. If both clocks are connected together, the counter state always is one count ahead of the register. Internal circuitry prevents clocking from the clock enable. A ripple carry output (RCO) is provided for cascading. Cascading is accomplished by connecting RCO of the first stage to CE of the second stage. Cascading for larger count chains can be accomplished by connecting RCO of each stage to the counter clock (CPC) input of the following stage. If both clocks are connected together, the counter state always is one count ahead of the register.

Features

■ Counter and register have independent clock inputs
■ Counter has master reset
■ Complies with JEDEC standard no. 7A
■ Multiple package options
■ ESD protection:
◆ HBM JESD22-A114E exceeds 2000 V
◆ MM JESD22-A115-A exceeds 200 V
◆ CDM JESD22-C101C exceeds 2000 V
■ Specified from −40 °C to +85 °C and from −40 °C to +125 °C

Environmental & Export Classifications

Description Value
RoHS Status: ROHS3 Compliant
Moisture Sensitivity Level (MSL): 1 (Unlimited)
REACH Status: REACH Unaffected
ECCN: EAR99
HTSUS: 8542.39.0001

Documents & Media

Datasheets: 74HC590PW,112 Datasheet
PCN Assembly/Origin: Mult Dev Assembly Site Add 31/Dec/2018
PCN Packaging: Label Chg 12/Mar/2017

Popularity by Region

  • 1. Finland
    100
  • 2. Norway
    99
  • 3. United States
    98
  • 4. Macao
    92
  • 5. San Marino
    92
  • 6. Netherlands
    92
  • 7. Eritrea
    91
  • 8. Laos
    91
  • 9. Brazil
    90
  • 10. Philippines
    90
  • 11. Mexico
    89
  • 12. Mongolia
    88
  • 13. Estonia
    87
  • 14. Greece
    86
  • 15. Israel
    86
  • 16. Bangladesh
    85
  • 17. Nigeria
    85
  • 18. South Africa
    85
  • 19. Japan
    85
  • 20. Ukraine
    84
  • 21. France
    84
  • 22. United Kingdom
    83
  • 23. Taiwan
    83
  • 24. Jordan
    83
  • 25. Latvia
    83
  • 26. Democratic Republic of the Congo
    83
  • 27. Uganda
    83
  • 28. Belarus
    82
  • 29. Luxembourg
    82
  • 30. Turkey
    82
  • 31. Cameroon
    82
  • 32. South Korea
    82
  • 33. Thailand
    82
  • 34. Switzerland
    82
  • 35. Malaysia
    81
  • 36. United Arab Emirates
    81
  • 37. Saudi Arabia
    81
  • 38. Egypt
    81
  • 39. Poland
    80
  • 40. Czech Republic
    80
  • 41. China
    80
  • 42. Croatia
    79
  • 43. Argentina
    79
  • 44. Romania
    79
  • 45. Slovenia
    79
  • 46. Colombia
    79
  • 47. Sri Lanka
    79
  • 48. Palestinian Territory
    78
  • 49. EUR
    78
  • 50. Bulgaria
    78
  • 51. Canada
    77
  • 52. Sweden
    77
  • 53. Denmark
    77
  • 54. Kenya
    76
  • 55. Kuwait
    76
  • 56. Honduras
    75
  • 57. Australia
    75
  • 58. Namibia
    73
  • 59. Italy
    73
  • 60. Germany
    72
  • 61. Spain
    72
  • 62. Singapore
    71
  • 63. Vietnam
    67
  • 64. Hong Kong
    65
  • 65. India
    65
  • 66. Pakistan
    65
  • 67. Austria
    63
  • 68. Hungary
    63
  • 69. Indonesia
    63
  • 70. Russia
    61

74HC590BQ,115 Popularity by Region

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74HC590BQ-115
Counter IC Binary Counter 1 Element 8 Bit Positive Edge 16-DHVQFN (2.5x3.5)
  • Product Attributes
  • Descriptions
  • Features
  • CAD Models
Series: 74HC
Part Status: Active
Logic Type: Binary Counter
Direction: Up
Number of Elements: 1
Number of Bits per Element: 8
Reset: Asynchronous
Timing: -
Count Rate: 61MHz
Trigger Type: Positive Edge
Voltage - Supply: 2V ~ 6V
Operating Temperature: -40°C ~ 125°C
Mounting Type: Surface Mount
Package / Case: 16-VFQFN Exposed Pad
Supplier Device Package: 16-DHVQFN (2.5x3.5)
Mfr: Nexperia USA Inc.
Package: Tape & Reel (TR)Cut Tape (CT)Digi-Reel®
Base Product Number: 74HC590

There is no relevant information available for this part yet.

FEATURES

General description

The 74HC590 is a high-speed Si-gate CMOS device and is pin compatible with Low power Schottky TTL (LSTTL). It is specified in compliance with JEDEC standard no. 7A.
The 74HC590 is an 8-bit binary counter with a storage register and 3-state outputs. The storage register has parallel (Q0 to Q7) outputs. The binary counter features a master reset counter (MRC) and count enable (CE) inputs. The counter and storage register have separate positive edge triggered clock (CPC and CPR) inputs. If both clocks are connected together, the counter state always is one count ahead of the register. Internal circuitry prevents clocking from the clock enable. A ripple carry output (RCO) is provided for cascading. Cascading is accomplished by connecting RCO of the first stage to CE of the second stage. Cascading for larger count chains can be accomplished by connecting RCO of each stage to the counter clock (CPC) input of the following stage. If both clocks are connected together, the counter state always is one count ahead of the register.

Features

■ Counter and register have independent clock inputs
■ Counter has master reset
■ Complies with JEDEC standard no. 7A
■ Multiple package options
■ ESD protection:
◆ HBM JESD22-A114E exceeds 2000 V
◆ MM JESD22-A115-A exceeds 200 V
◆ CDM JESD22-C101C exceeds 2000 V
■ Specified from −40 °C to +85 °C and from −40 °C to +125 °C

There is no relevant information available for this part yet.