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Home  Logic - Shift Registers  74HC4094PW,118 Datasheets | Logic - Shift Registers Shift Shift Register 1 Element 8 Bit 16-TSSOP

Mar 2 2021

74HC4094PW,118 Datasheets | Logic - Shift Registers Shift Shift Register 1 Element 8 Bit 16-TSSOP

Product Overview

Image:
74HC4094PW-118
Manufacturer Part#: 74HC4094PW,118
Product Category: Logic - Shift Registers
Stock: No
Manufacturer: Nexperia USA Inc.
Description: Shift Shift Register 1 Element 8 Bit 16-TSSOP
Datasheet: 74HC4094D,652 Datasheet
Package: 16-TSSOP (0.173"", 4.40mm Width)
Minimum: 1
Lead Time: 8 Weeks
Quantity: On Order
Send RFQ: Inquiry

Reference Price

Qty Unit Price Ext. Price
1: 0.45000 0.45000
10: 0.38400 3.84000
25: 0.35840 8.96000
100: 0.28670 28.67000
250: 0.26628 66.57000
500: 0.22530 112.65000
1000: 0.17410 174.10000
2500: 0.15874 396.85000
5000: 0.14849 742.45000
12500: 0.13825 1728.12500
25000: 0.13475 3368.75000

74HC4094PW,118 Images are for reference only.

74HC4094PW,118

CAD Models

Product Attributes

Series: 74HC
Part Status: Active
Logic Type: Shift Register
Output Type: Tri-State
Number of Elements: 1
Number of Bits per Element: 8
Function: Serial to Parallel Serial
Voltage - Supply: 2V ~ 6V
Operating Temperature: -40°C ~ 125°C
Mounting Type: Surface Mount
Package / Case: 16-TSSOP (0.173"" 4.40mm Width)
Supplier Device Package: 16-TSSOP
Mfr: Nexperia USA Inc.
Package: Tape & Reel (TR)Cut Tape (CT)Digi-Reel®
Base Product Number: 74HC4094

Descriptions

There is no relevant information available for this part yet.

FEATURES

General description

The 74HC4094; 74HCT4094 is an 8-bit serial-in/serial or parallel-out shift register with a storage register and 3-state outputs. Both the shift and storage register have separate clocks. The device features a serial input (D) and two serial outputs (QS1 and QS2) to enable cascading. Data is shifted on the LOW-to-HIGH transitions of the CP input. Data is available at QS1 on the LOW-to-HIGH transitions of the CP input to allow cascading when clock edges are fast. The same data is available at QS2 on the next HIGH-to-LOW transition of the CP input to allow cascading when clock edges are slow. The data in the shift register is transferred to the storage register when the STR input is HIGH. Data in the storage register appears at the outputs whenever the output enable input (OE) is HIGH. A LOW on OE causes the outputs to assume a high-impedance OFF-state. Operation of the OE input does not affect the state of the registers. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC.

Features and benefits

■ Complies with JEDEC standard JESD7A
■ Input levels:
◆ For 74HC4094: CMOS level
◆ For 74HCT4094: TTL level
■ Low-power dissipation
■ ESD protection:
◆ HBM JESD22-A114F exceeds 2 000 V
◆ MM JESD22-A115-A exceeds 200 V
■ Specified from -40°C to +85°C and from -40°C to +125°C

Applications

■ Serial-to-parallel data conversion
■ Remote control holding register

Environmental & Export Classifications

Description Value
RoHS Status: ROHS3 Compliant
Moisture Sensitivity Level (MSL): 1 (Unlimited)
REACH Status: REACH Unaffected
ECCN: EAR99
HTSUS: 8542.39.0001

Documents & Media

Datasheets: 74HC4094D,652 Datasheet
PCN Assembly/Origin: Wafer Fab Site Add 21/Dec/2016
PCN Packaging: Label Chg 12/Mar/2017
HTML Datasheet: All Dev Label Chgs 2/Aug/2020

Popularity by Region

  • 1. China
    100
  • 2. Singapore
    97
  • 3. Hong Kong
    85
  • 4. Gambia
    85
  • 5. Slovakia
    81
  • 6. Taiwan
    81
  • 7. Turkey
    80
  • 8. Gibraltar
    80
  • 9. Reunion
    80
  • 10. Philippines
    79
  • 11. Mexico
    78
  • 12. Greece
    78
  • 13. Mongolia
    78
  • 14. Guinea
    78
  • 15. Portugal
    77
  • 16. Colombia
    77
  • 17. Switzerland
    77
  • 18. Bangladesh
    77
  • 19. Latvia
    77
  • 20. Denmark
    76
  • 21. Ghana
    76
  • 22. Indonesia
    76
  • 23. Georgia
    76
  • 24. Finland
    76
  • 25. Sri Lanka
    75
  • 26. Hungary
    75
  • 27. Poland
    75
  • 28. Mali
    75
  • 29. Macao
    75
  • 30. Saudi Arabia
    75
  • 31. Ukraine
    74
  • 32. New Zealand
    74
  • 33. Belarus
    74
  • 34. Czech Republic
    74
  • 35. Grenada
    74
  • 36. Tunisia
    74
  • 37. Norway
    74
  • 38. Japan
    73
  • 39. Jordan
    73
  • 40. Bulgaria
    73
  • 41. Luxembourg
    73
  • 42. Moldova
    73
  • 43. Cameroon
    72
  • 44. Spain
    72
  • 45. Thailand
    72
  • 46. South Africa
    72
  • 47. United Arab Emirates
    71
  • 48. Lithuania
    71
  • 49. Belgium
    71
  • 50. Israel
    71
  • 51. Chile
    70
  • 52. Netherlands
    70
  • 53. Croatia
    70
  • 54. Argentina
    70
  • 55. Turks and Caicos Islands
    70
  • 56. Uruguay
    70
  • 57. EUR
    69
  • 58. Palestinian Territory
    69
  • 59. Australia
    69
  • 60. Pakistan
    69
  • 61. Egypt
    68
  • 62. Serbia
    68
  • 63. Canada
    67
  • 64. South Korea
    67
  • 65. Algeria
    67
  • 66. Sweden
    67
  • 67. Slovenia
    66
  • 68. India
    65
  • 69. Dominican Republic
    65
  • 70. Brazil
    65
  • 71. United States
    64
  • 72. Malta
    64
  • 73. Russia
    60
  • 74. Austria
    59
  • 75. Germany
    59
  • 76. France
    59
  • 77. Italy
    59
  • 78. Vietnam
    59
  • 79. Romania
    58
  • 80. United Kingdom
    57
  • 81. Malaysia
    55

74HC4094PW,118 Popularity by Region

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74HC4094PW-118
Shift Shift Register 1 Element 8 Bit 16-TSSOP
  • Product Attributes
  • Descriptions
  • Features
  • CAD Models
Series: 74HC
Part Status: Active
Logic Type: Shift Register
Output Type: Tri-State
Number of Elements: 1
Number of Bits per Element: 8
Function: Serial to Parallel Serial
Voltage - Supply: 2V ~ 6V
Operating Temperature: -40°C ~ 125°C
Mounting Type: Surface Mount
Package / Case: 16-TSSOP (0.173"" 4.40mm Width)
Supplier Device Package: 16-TSSOP
Mfr: Nexperia USA Inc.
Package: Tape & Reel (TR)Cut Tape (CT)Digi-Reel®
Base Product Number: 74HC4094

There is no relevant information available for this part yet.

FEATURES

General description

The 74HC4094; 74HCT4094 is an 8-bit serial-in/serial or parallel-out shift register with a storage register and 3-state outputs. Both the shift and storage register have separate clocks. The device features a serial input (D) and two serial outputs (QS1 and QS2) to enable cascading. Data is shifted on the LOW-to-HIGH transitions of the CP input. Data is available at QS1 on the LOW-to-HIGH transitions of the CP input to allow cascading when clock edges are fast. The same data is available at QS2 on the next HIGH-to-LOW transition of the CP input to allow cascading when clock edges are slow. The data in the shift register is transferred to the storage register when the STR input is HIGH. Data in the storage register appears at the outputs whenever the output enable input (OE) is HIGH. A LOW on OE causes the outputs to assume a high-impedance OFF-state. Operation of the OE input does not affect the state of the registers. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC.

Features and benefits

■ Complies with JEDEC standard JESD7A
■ Input levels:
◆ For 74HC4094: CMOS level
◆ For 74HCT4094: TTL level
■ Low-power dissipation
■ ESD protection:
◆ HBM JESD22-A114F exceeds 2 000 V
◆ MM JESD22-A115-A exceeds 200 V
■ Specified from -40°C to +85°C and from -40°C to +125°C

Applications

■ Serial-to-parallel data conversion
■ Remote control holding register

There is no relevant information available for this part yet.