Product Overview
| Image: |
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| Manufacturer Part#: | 74HC175N,652 |
| Product Category: | Logic - Flip Flops |
| Stock: | No |
| Manufacturer: | NXP USA Inc. |
| Description: | IC FF D-TYPE SNGL 4BIT 16DIP |
| Datasheet: | 74HC(T)175 |
| Package: | 16-DIP |
| Minimum: | 1 |
| Lead Time: | 3(168 Hours) |
| Quantity: | On Order |
| Send RFQ: | Inquiry |
74HC175N,652 Images are for reference only.
CAD Models
Product Attributes
| Manufacturer: | NXP USA Inc． |
| Series: | 74HC |
| Packaging: | Tube |
| Part Status: | Obsolete |
| Function: | Master Reset |
| Type: | D-Type |
| Output Type: | Differential |
| Number of Elements: | 1 |
| Number of Bits per Element: | 4 |
| Clock Frequency: | 89MHz |
| Max Propagation Delay @ V Max CL: | 30ns @ 6V 50pF |
| Trigger Type: | Positive Edge |
| Current - Output High Low: | 5．2mA 5．2mA |
| Voltage - Supply: | 2V ~ 6V |
| Current - Quiescent (Iq): | 8µA |
| Input Capacitance: | 3．5pF |
| Operating Temperature: | -40°C ~ 125°C (TA) |
| Mounting Type: | Through Hole |
| Supplier Device Package: | 16-DIP |
| Package / Case: | 16-DIP (0．300" 7．62mm) |
| Base Part Number: | 74HC17 |
Alternative Models
| Part | Compare | Manufacturers | Category | Description | |
| Mfr.Part#:74HC175N,652 | Compare: Current Part | Manufacturers:NXP | Category:Flip Flops | Description: Flip Flop D-Type Bus Interface Pos-Edge 1Element 16Pin PDIP Bulk | |
| Mfr.Part#:74HC175N | Compare: 74HC175N,652 VS 74HC175N | Manufacturers:NXP | Category:Flip Flops | Description: Flip Flop D-Type Bus Interface Pos-Edge 1Element 16Pin PDIP | |
| Mfr.Part#:MM54HC175J | Compare: 74HC175N,652 VS MM54HC175J | Manufacturers:Rochester | Category: | Description: D Flip-Flop, HC/UH Series, 1-Func, Positive Edge Triggered, 4-Bit, Complementary Output, CMOS, CDIP16, CERAMIC, DIP-16 |
Descriptions
There is no relevant information available for this part yet.
FEATURES
General description
The 74HC175; 74HCT175 are quad positive edge-triggered D-type flip-flops with individual data inputs (Dn) and both Qn and Qn outputs. The common clock (CP) and master reset (MR) inputs load and reset all flip-flops simultaneously. The D-input that meets the set-up and hold time requirements on the LOW-to-HIGH clock transition is stored in the flip-flop and appears at the Q output. A LOW on MR causes the flip-flops and outputs to be reset LOW.The device is useful for applications where both the true and complement outputs are required and the clock and master reset are common to all storage elements.
Features and benefits
■ Input levels:◆ For 74HC175: CMOS level
◆ For 74HCT175: TTL level
■ Four edge-triggered D-type flip-flops
■ Asynchronous master reset
■ Complies with JEDEC standard no. 7A
■ ESD protection:
◆ HBM JESD22-A114F exceeds 2000 V
◆ MM JESD22-A115-A exceeds 200 V.
■ Multiple package options
■ Specified from -40 °C to +85 °C and -40 °C to +125 °C.
Environmental & Export Classifications
| Description | Value |
| RoHS Status: | ROHS3 Compliant |
| Moisture Sensitivity Level (MSL): | 1 (Unlimited) |
Documents & Media
| Datasheets: | 74HC(T)175 |
| Environmental Information: | 74HC(T)175 |
| PCN Obsolescence/ EOL: | NXP RoHS3 Cert |
| PCN Assembly/Origin: | Multiple Devices 29/Dec/2014 |
| PCN Packaging: | ICN6 to ICN8 Transfer 13/Jul/2013 |
| HTML Datasheet: | Date Code Extended 18/Jul/2013 |
| EDA / CAD Models: | 74HC(T)175 |
Distributors
| Image | PartNo | Manufacturer | Descriptions | Stock | Step Price |
|
|
74HC175N,652 | NXP USA Inc. | IC FF D-TYPE SNGL 4BIT 16DIP | On Order | N/A |
|
|
74HC175N,652 | NXP Semiconductors | 74HC(T)175 - Quad D-type flip-flop with reset; positive-edge trigger DIP 16-Pin | On Order | $0.1300 |
Popularity by Region
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1. Australia100
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2. Romania99
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3. Benin98
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4. Puerto Rico95
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5. Saint Lucia95
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6. United States95
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7. Taiwan94
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8. Estonia94
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9. Qatar94
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10. Serbia93
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11. Canada91
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12. Sweden91
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13. Switzerland90
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14. United Kingdom89
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15. Ukraine89
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16. Afghanistan89
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19. France88
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20. China88
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21. South Korea88
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22. India87
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23. Poland87
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24. Hong Kong86
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25. Russia85
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26. Egypt82
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27. Brazil82
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29. Germany82
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30. Bulgaria81
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31. Turkey79
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32. Singapore79
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33. Mexico79
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34. Italy78
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35. Spain78
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36. Israel77
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- Product Attributes
- Descriptions
- Features
- CAD Models
74HC175N,652 Popularity by Region
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| Manufacturer: | NXP USA Inc． |
| Series: | 74HC |
| Packaging: | Tube |
| Part Status: | Obsolete |
| Function: | Master Reset |
| Type: | D-Type |
| Output Type: | Differential |
| Number of Elements: | 1 |
| Number of Bits per Element: | 4 |
| Clock Frequency: | 89MHz |
| Max Propagation Delay @ V Max CL: | 30ns @ 6V 50pF |
| Trigger Type: | Positive Edge |
| Current - Output High Low: | 5．2mA 5．2mA |
| Voltage - Supply: | 2V ~ 6V |
| Current - Quiescent (Iq): | 8µA |
| Input Capacitance: | 3．5pF |
| Operating Temperature: | -40°C ~ 125°C (TA) |
| Mounting Type: | Through Hole |
| Supplier Device Package: | 16-DIP |
| Package / Case: | 16-DIP (0．300" 7．62mm) |
| Base Part Number: | 74HC17 |
There is no relevant information available for this part yet.
FEATURES
General description
The 74HC175; 74HCT175 are quad positive edge-triggered D-type flip-flops with individual data inputs (Dn) and both Qn and Qn outputs. The common clock (CP) and master reset (MR) inputs load and reset all flip-flops simultaneously. The D-input that meets the set-up and hold time requirements on the LOW-to-HIGH clock transition is stored in the flip-flop and appears at the Q output. A LOW on MR causes the flip-flops and outputs to be reset LOW.The device is useful for applications where both the true and complement outputs are required and the clock and master reset are common to all storage elements.
Features and benefits
■ Input levels:◆ For 74HC175: CMOS level
◆ For 74HCT175: TTL level
■ Four edge-triggered D-type flip-flops
■ Asynchronous master reset
■ Complies with JEDEC standard no. 7A
■ ESD protection:
◆ HBM JESD22-A114F exceeds 2000 V
◆ MM JESD22-A115-A exceeds 200 V.
■ Multiple package options
■ Specified from -40 °C to +85 °C and -40 °C to +125 °C.
There is no relevant information available for this part yet.