Product Overview
| Image: |
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| Manufacturer Part#: | 74ALVT16260DGG,118 |
| Product Category: | Logic - Latches |
| Stock: | No |
| Manufacturer: | NXP USA Inc. |
| Description: | IC 12-24BIT MUX D LATCH 56TSSOP |
| Datasheet: | 74ALVT16260 |
| Package: | 56-TFSOP (0.240", 6.10mm Width) |
| Minimum: | 1 |
| Lead Time: | 3(168 Hours) |
| Quantity: | On Order |
| Send RFQ: | Inquiry |
74ALVT16260DGG,118 Images are for reference only.
CAD Models
Product Attributes
| Manufacturer: | NXP USA Inc． |
| Series: | 74ALVT |
| Packaging: | Tape & Reel (TR) |
| Part Status: | Obsolete |
| Logic Type: | D-Type Transparent Latch |
| Circuit: | 12 |
| Output Type: | Tri-State |
| Voltage - Supply: | 2．3V ~ 2．7V |
| Independent Circuits: | 1 |
| Delay Time - Propagation: | 2．8ns |
| Current - Output High Low: | 8mA 24mA |
| Operating Temperature: | -40°C ~ 85°C |
| Mounting Type: | Surface Mount |
| Package / Case: | 56-TFSOP (0．240" 6．10mm Width) |
| Supplier Device Package: | 56-TSSOP |
| Base Part Number: | 74ALVT1 |
Descriptions
There is no relevant information available for this part yet.
FEATURES
General description
The 74ALVT16260 is a 12-bit to 24-bit multiplexed D-type latch used in applications where two separate data paths must be multiplexed onto, or demultiplexed from, a single data path. Typical applications include multiplexing or demultiplexing of address and data information in microprocessor or bus-interface applications. This device is also useful in memory-interleaving applications.Features
■ 5 V I/O compatible■ Bus hold inputs eliminate the need for external pull-up resistors
■ Live insertion and extraction permitted
■ Power-up 3-state
■ Power-up reset
■ Output capability: +64 mA and −32 mA
■ Distributed VCC and GND pin configuration minimizes high-speed switching noise
■ Latch-up protection:
◆ JESD78: exceeds 500 mA
■ ESD protection:
◆ MIL STD 883C, method 3015: exceeds 2000 V
◆ Machine model: exceeds 200 V
Environmental & Export Classifications
| Description | Value |
| RoHS Status: | ROHS3 Compliant |
| Moisture Sensitivity Level (MSL): | 1 (Unlimited) |
Documents & Media
| Datasheets: | 74ALVT16260 |
| HTML Datasheet: | 74ALVT16260 |
Distributors
| Image | PartNo | Manufacturer | Descriptions | Stock | Step Price |
|
|
74ALVT16260DGG,118 | NXP USA Inc. | IC 12-24BIT MUX D LATCH 56TSSOP | On Order | N/A |
|
|
74ALVT16260DGG,118 | NXP Semiconductors | 74ALVT16260 - 12-bit to 24-bit multiplexed D-type latches; 3-state TSSOP 56-Pin | On Order | N/A |
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- Product Attributes
- Descriptions
- Features
- CAD Models
74ALVT16260DGG,118 Popularity by Region
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| Returning/warranty | Returning | Returns are normally accepted when completed within 365 days from date of shipment, please contact customer service for a return authorization. |
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| Customer has to take charge for the shipping. | ||
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| Manufacturer: | NXP USA Inc． |
| Series: | 74ALVT |
| Packaging: | Tape & Reel (TR) |
| Part Status: | Obsolete |
| Logic Type: | D-Type Transparent Latch |
| Circuit: | 12 |
| Output Type: | Tri-State |
| Voltage - Supply: | 2．3V ~ 2．7V |
| Independent Circuits: | 1 |
| Delay Time - Propagation: | 2．8ns |
| Current - Output High Low: | 8mA 24mA |
| Operating Temperature: | -40°C ~ 85°C |
| Mounting Type: | Surface Mount |
| Package / Case: | 56-TFSOP (0．240" 6．10mm Width) |
| Supplier Device Package: | 56-TSSOP |
| Base Part Number: | 74ALVT1 |
There is no relevant information available for this part yet.
FEATURES
General description
The 74ALVT16260 is a 12-bit to 24-bit multiplexed D-type latch used in applications where two separate data paths must be multiplexed onto, or demultiplexed from, a single data path. Typical applications include multiplexing or demultiplexing of address and data information in microprocessor or bus-interface applications. This device is also useful in memory-interleaving applications.Features
■ 5 V I/O compatible■ Bus hold inputs eliminate the need for external pull-up resistors
■ Live insertion and extraction permitted
■ Power-up 3-state
■ Power-up reset
■ Output capability: +64 mA and −32 mA
■ Distributed VCC and GND pin configuration minimizes high-speed switching noise
■ Latch-up protection:
◆ JESD78: exceeds 500 mA
■ ESD protection:
◆ MIL STD 883C, method 3015: exceeds 2000 V
◆ Machine model: exceeds 200 V
There is no relevant information available for this part yet.