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Home  Logic - Buffers, Drivers, Receivers, Transceivers  74ABT652APW,118 Datasheets | Logic - Buffers, Drivers, Receivers, Transceivers IC TXRX NON-INVERT 5.5V 24TSSOP

Oct 8 2020

74ABT652APW,118 Datasheets | Logic - Buffers, Drivers, Receivers, Transceivers IC TXRX NON-INVERT 5.5V 24TSSOP

Product Overview

Image:
74ABT652APW-118
Manufacturer Part#: 74ABT652APW,118
Product Category: Logic - Buffers, Drivers, Receivers, Transceivers
Stock: No
Manufacturer: NXP USA Inc.
Description: IC TXRX NON-INVERT 5.5V 24TSSOP
Datasheet: 74ABT652A
Package: 24-TSSOP (0.173", 4.40mm Width)
Minimum: 1
Lead Time: 3(168 Hours)
Quantity: On Order
Send RFQ: Inquiry

74ABT652APW,118 Images are for reference only.

74ABT652APW,118

CAD Models

Product Attributes

Manufacturer: NXP USA Inc.
Series: 74ABT
Packaging: Tape & Reel (TR)
Part Status: Obsolete
Logic Type: Transceiver Non-Inverting
Number of Elements: 1
Number of Bits per Element: 8
Input Type: -
Output Type: 3-State
Current - Output High Low: 32mA 64mA
Voltage - Supply: 4.5V ~ 5.5V
Operating Temperature: -40°C ~ 85°C (TA)
Mounting Type: Surface Mount
Package / Case: 24-TSSOP (0.173" 4.40mm Width)
Supplier Device Package: 24-TSSOP
Base Part Number: 74ABT65

Descriptions

Bus XCVR Single 8-CH 3-ST 24-Pin TSSOP T/R:Avnet
IC TRANSCVR 8BIT N-INV 24TSSOP:Digi-Key

FEATURES

General description

The 74ABT652A high-performance BiCMOS device combines low static and dynamic power dissipation with high speed and high output drive.
The 74ABT652A transceiver/register consists of bus transceiver circuits with 3-state outputs, D-type flip-flops, and control circuitry arranged for multiplexed transmission of data directly from the input bus or the internal registers. Data on the A or B bus will be clocked into the registers as the appropriate clock pin (CPAB or CPBA) goes HIGH. Output Enable (OEAB, OEBA) and Select (SAB, SBA) pins are provided for bus management.

Features and benefits

■ Independent registers for A and B buses
■ Multiplexed real-time and stored data
■ 3-state outputs
■ Live insertion/extraction permitted
■ Power-up 3-state
■ Power-up reset
■ Output capability: +64 mA to −32 mA
■ Latch-up protection exceeds 500 mA per JESD78B class II level A
■ ESD protection:
♦ HBM JESD22-A114F exceeds 2000 V
♦ MM JESD22-A115-A exceeds 200 V

Environmental & Export Classifications

Description Value
RoHS Status: ROHS3 Compliant
Moisture Sensitivity Level (MSL): 1 (Unlimited)

Documents & Media

Datasheets: 74ABT652A
PCN Obsolescence/ EOL: Multiple Devices 25/Dec/2013

Distributors

Image PartNo Manufacturer Descriptions Stock Step Price
74ABT652APW-118 74ABT652APW,118 NXP USA Inc. IC TXRX NON-INVERT 5.5V 24TSSOP On Order

N/A

74ABT652APW-118 74ABT652APW,118 NXP Semiconductors Bus XCVR Single 8-CH 3-ST 24-Pin TSSOP T/R:Avnet
IC TRANSCVR 8BIT N-INV 24TSSOP:Digi-Key
On Order N/A
74ABT652APW-118 74ABT652APW,118 NXP Semiconductors 74ABT652A - Octal transceiver/register; non-inverting; 3-state TSSOP2 24-Pin On Order

N/A

Popularity by Region

  • 1. China
    100
  • 2. United States
    95

74ABT652APW,118 Popularity by Region

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  • Product Attributes
  • Descriptions
  • Features
  • CAD Models
Manufacturer: NXP USA Inc.
Series: 74ABT
Packaging: Tape & Reel (TR)
Part Status: Obsolete
Logic Type: Transceiver Non-Inverting
Number of Elements: 1
Number of Bits per Element: 8
Input Type: -
Output Type: 3-State
Current - Output High Low: 32mA 64mA
Voltage - Supply: 4.5V ~ 5.5V
Operating Temperature: -40°C ~ 85°C (TA)
Mounting Type: Surface Mount
Package / Case: 24-TSSOP (0.173" 4.40mm Width)
Supplier Device Package: 24-TSSOP
Base Part Number: 74ABT65

Bus XCVR Single 8-CH 3-ST 24-Pin TSSOP T/R:Avnet
IC TRANSCVR 8BIT N-INV 24TSSOP:Digi-Key

FEATURES

General description

The 74ABT652A high-performance BiCMOS device combines low static and dynamic power dissipation with high speed and high output drive.
The 74ABT652A transceiver/register consists of bus transceiver circuits with 3-state outputs, D-type flip-flops, and control circuitry arranged for multiplexed transmission of data directly from the input bus or the internal registers. Data on the A or B bus will be clocked into the registers as the appropriate clock pin (CPAB or CPBA) goes HIGH. Output Enable (OEAB, OEBA) and Select (SAB, SBA) pins are provided for bus management.

Features and benefits

■ Independent registers for A and B buses
■ Multiplexed real-time and stored data
■ 3-state outputs
■ Live insertion/extraction permitted
■ Power-up 3-state
■ Power-up reset
■ Output capability: +64 mA to −32 mA
■ Latch-up protection exceeds 500 mA per JESD78B class II level A
■ ESD protection:
♦ HBM JESD22-A114F exceeds 2000 V
♦ MM JESD22-A115-A exceeds 200 V

There is no relevant information available for this part yet.