74ABT374ADB,118 Datasheets| NXP USA Inc. | PDF| Price| In Stock

General description

The 74ABT374A high-performance BiCMOS device combines low static and dynamic power dissipation with high speed and high output drive.
The 74ABT374A is an 8-bit, edge triggered register coupled to eight 3-state output buffers. The two sections of the device are controlled independently by the clock input (CP) and output enable input (OE) control gates.
The register is fully edge-triggered. The state of each D input, one set-up time before the LOW-to-HIGH clock transition, is transferred to the corresponding flip-flop’s Q output. The 3-state output buffers are designed to drive heavily loaded 3-state buses, MOS memories, or MOS microprocessors. The active LOW output enable (OE) controls all eight 3-state buffers independent of the clock operation.
When OE is LOW, the stored data appears at the outputs. When OE is HIGH, the outputs are in the high-impedance “OFF” state, which means they will neither drive nor load the bus.

Features and benefits

■ 8-bit positive edge triggered register
■ 3-state output buffers
■ Power-on 3-state
■ Power-on reset
■ Output capability: +64 mA/32 mA
■ Latch-up protection exceeds 500 mA per JESD78B class II level A
■ ESD protection:
◆ HBM JESD22-A114F exceeds 2000 V
◆ MM JESD22-A115-A exceeds 200 V
■ Live insertion/extraction permitted