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Sep 8 2020

EPM7128SLC84-15N Datasheets | Embedded - CPLDs (Complex Programmable Logic Devices) IC CPLD 128MC 15NS 84PLCC

Product Overview

Image:
EPM7128SLC84-15N
Manufacturer Part#: EPM7128SLC84-15N
Product Category: Embedded - CPLDs (Complex Programmable Logic Devices)
Stock: No
Manufacturer: Intel
Description: IC CPLD 128MC 15NS 84PLCC
Datasheet: MAX 7000
Package: 84-LCC (J-Lead)
Minimum: 1
Lead Time: 3(168 Hours)
Quantity: On Order
Send RFQ: Inquiry

EPM7128SLC84-15N Images are for reference only.

EPM7128SLC84-15N

CAD Models

Product Attributes

Manufacturer: Intel
Series: MAX® 7000S
Packaging: Tray
Part Status: Obsolete
Programmable Type: In System Programmable
Delay Time tpd(1) Max: 15ns
Voltage Supply - Internal: 4.75V ~ 5.25V
Number of Macrocells: 128
Number of I/O: 68
Operating Temperature: 0°C ~ 70°C (TA)
Mounting Type: Surface Mount
Package / Case: 84-LCC (J-Lead)
Supplier Device Package: 84-PLCC (29.31x29.31)
Base Part Number: EPM7128
Number of Logic Elements/Blocks: 8
Number of Gates: 2500

Alternative Models

Part Compare Manufacturers Category Description
Mfr.Part#:EPM7128SLC84-15N Compare: Current Part Manufacturers:Altera Category:CPLDs Description: CPLD MAX 7000 Family 2.5K Gates 128 Macro Cells 76.9MHz 5V 84Pin PLCC
Mfr.Part#:EPM7128ELC84-15 Compare: EPM7128SLC84-15N VS EPM7128ELC84-15 Manufacturers:Altera Category:CPLDs Description: CPLD MAX 7000 Family 2.5K Gates 128 Macro Cells 76.9MHz CMOS Technology 5V 84Pin PLCC
Mfr.Part#:EPM7128SLC84-10 Compare: EPM7128SLC84-15N VS EPM7128SLC84-10 Manufacturers:Altera Category:CPLDs Description: CPLD MAX 7000S Family 2.5K Gates 128 Macro Cells 100MHz 5V 84Pin PLCC CPLD MAX 7000S Family 2.5K Gates 128 Macro Cel...
Mfr.Part#:EPM7096LC84-7 Compare: EPM7128SLC84-15N VS EPM7096LC84-7 Manufacturers:Altera Category:CPLDs Description: CPLD MAX 7000 Family 1.8K Gates 96 Macro Cells 125MHz CMOS Technology 5V 84Pin PLCC

Descriptions

There is no relevant information available for this part yet.

FEATURES

General Description

The MAX 7000 family of high-density, high-performance PLDs is based on Altera’s second-generation MAX architecture. Fabricated with advanced CMOS technology, the EEPROM-based MAX 7000 family provides 600 to 5,000 usable gates, ISP, pin-to-pin delays as fast as 5 ns, and counter speeds of up to 175.4 MHz.

Features...

■ High-performance, EEPROM-based programmable logic devices
(PLDs) based on second-generation MAX® architecture
■ 5.0-V in-system programmability (ISP) through the built-in
IEEE Std. 1149.1 Joint Test Action Group (JTAG) interface available in
MAX 7000S devices
– ISP circuitry compatible with IEEE Std. 1532
■ Includes 5.0-V MAX 7000 devices and 5.0-V ISP-based MAX 7000S
devices
■ Built-in JTAG boundary-scan test (BST) circuitry in MAX 7000S
devices with 128 or more macrocells
■ Complete EPLD family with logic densities ranging from 600 to
5,000 usable gates (see Tables 1 and 2)
■ 5-ns pin-to-pin logic delays with up to 175.4-MHz counter
frequencies (including interconnect)
■ PCI-compliant devices available
■ Open-drain output option in MAX 7000S devices
■ Programmable macrocell flipflops with individual clear, preset,
clock, and clock enable controls
■ Programmable power-saving mode for a reduction of over 50% in
each macrocell
■ Configurable expander product-term distribution, allowing up to
32 product terms per macrocell
■ 44 to 208 pins available in plastic J-lead chip carrier (PLCC), ceramic
pin-grid array (PGA), plastic quad flat pack (PQFP), power quad flat
pack (RQFP), and 1.0-mm thin quad flat pack (TQFP) packages
■ Programmable security bit for protection of proprietary designs
■ 3.3-V or 5.0-V operation
– MultiVoltTM I/O interface operation, allowing devices to
interface with 3.3-V or 5.0-V devices (MultiVolt I/O operation is
not available in 44-pin packages)
– Pin compatible with low-voltage MAX 7000A and MAX 7000B
devices
■ Enhanced features available in MAX 7000E and MAX 7000S devices
– Six pin- or logic-driven output enable signals
– Two global clock signals with optional inversion
– Enhanced interconnect resources for improved routability
– Fast input setup times provided by a dedicated path from I/O
pin to macrocell registers
– Programmable output slew-rate control
■ Software design support and automatic place-and-route provided by
Altera’s development system for Windows-based PCs and Sun
SPARCstation, and HP 9000 Series 700/800 workstations
■ Additional design entry and simulation support provided by EDIF
2 0 0 and 3 0 0 netlist files, library of parameterized modules (LPM),
Verilog HDL, VHDL, and other interfaces to popular EDA tools from
manufacturers such as Cadence, Exemplar Logic, Mentor Graphics,
OrCAD, Synopsys, and VeriBest
■ Programming support
– Altera’s Master Programming Unit (MPU) and programming
hardware from third-party manufacturers program all
MAX 7000 devices
– The BitBlasterTM serial download cable, ByteBlasterMVTM
parallel port download cable, and MasterBlasterTM
serial/universal serial bus (USB) download cable program MAX
7000S devices

Environmental & Export Classifications

Description Value
Moisture Sensitivity Level (MSL): 3 (168 Hours)

Documents & Media

Datasheets: MAX 7000
Design Resources: 84PLCC Pkg Info
PCN Obsolescence/ EOL: Development Tool Selector
PCN Packaging: EOL 21/Nov/2016
HTML Datasheet: EOL 01/Dec/2016
PCN Design/Specification: All Dev Pkg Chg 1/Aug/2018
EDA / CAD Models: Mult Dev Dessicant Chg 19/Jul/2019

Product Manufacturer

Intel enables designers of electronic systems to rapidly and cost effectively innovate, differentiate, and win in their markets. Intel offers FPGAs, SoCs, CPLDs, and Power Solutions, to provide high-value solutions to customers worldwide.

Distributors

Image PartNo Manufacturer Descriptions Stock Step Price
EPM7128SLC84-15N EPM7128SLC84-15N Intel IC CPLD 128MC 15NS 84PLCC On Order N/A
EPM7128SLC84-15N EPM7128SLC84-15N Intel N/A On Order

1:$10.868

EPM7128SLC84-15N EPM7128SLC84-15N Intel Corporation EE PLD, 15ns, 128-Cell, CMOS, PQCC84, PLASTIC, LCC-84 On Order

$11.8800

Popularity by Region

  • 1. Spain
    100
  • 2. United States
    100
  • 3. Denmark
    86
  • 4. China
    86
  • 5. Brazil
    85
  • 6. Russia
    83
  • 7. Latvia
    78
  • 8. Thailand
    77
  • 9. India
    75
  • 9. India
    75
  • 10. Sweden
    74
  • 10. Sweden
    74
  • 11. Luxembourg
    74
  • 11. Luxembourg
    74
  • 12. Tanzania
    71
  • 12. Tanzania
    71
  • 13. Israel
    70
  • 13. Israel
    70
  • 14. Poland
    70
  • 15. France
    69
  • 16. Colombia
    68
  • 17. Sri Lanka
    68
  • 18. Liberia
    67
  • 19. Malaysia
    67
  • 20. Albania
    67
  • 21. Germany
    67
  • 22. Canada
    67
  • 23. Burundi
    67
  • 23. Burundi
    67
  • 24. Kenya
    66
  • 25. Belarus
    66
  • 26. South Korea
    65
  • 27. Australia
    65
  • 28. Taiwan
    65
  • 29. Turkey
    64
  • 30. Norway
    64
  • 31. Vietnam
    64
  • 31. Vietnam
    64
  • 32. Japan
    64
  • 32. Japan
    64
  • 33. Finland
    64
  • 33. Finland
    64
  • 34. Belgium
    64
  • 34. Belgium
    64
  • 35. Singapore
    64
  • 35. Singapore
    64
  • 36. Mongolia
    63
  • 36. Mongolia
    63
  • 37. Zambia
    62
  • 37. Zambia
    62
  • 38. Switzerland
    62
  • 38. Switzerland
    62
  • 39. Venezuela
    62
  • 39. Venezuela
    62
  • 40. Pakistan
    62
  • 40. Pakistan
    62
  • 41. Italy
    62
  • 41. Italy
    62
  • 42. Ukraine
    62
  • 42. Ukraine
    62
  • 43. United Kingdom
    62
  • 43. United Kingdom
    62
  • 44. Comoros
    61
  • 44. Comoros
    61
  • 45. Malta
    61
  • 45. Malta
    61
  • 46. Austria
    61
  • 46. Austria
    61
  • 47. New Zealand
    60
  • 47. New Zealand
    60
  • 48. Bangladesh
    60
  • 49. Bulgaria
    60
  • 49. Bulgaria
    60
  • 50. Slovakia
    60
  • 51. Portugal
    60
  • 51. Portugal
    60
  • 52. Tunisia
    60
  • 53. Algeria
    60
  • 53. Algeria
    60
  • 54. South Africa
    60
  • 55. Moldova
    59
  • 55. Moldova
    59
  • 56. Ireland
    59
  • 57. Saint Kitts and Nevis
    59
  • 58. North Macedonia
    59
  • 59. Ethiopia
    59
  • 60. El Salvador
    59
  • 61. Costa Rica
    58
  • 62. Netherlands
    58
  • 62. Netherlands
    58
  • 63. Philippines
    58
  • 64. Zimbabwe
    58
  • 64. Zimbabwe
    58
  • 65. Laos
    58
  • 66. Nepal
    58
  • 66. Nepal
    58
  • 67. Saudi Arabia
    58
  • 68. Egypt
    58
  • 68. Egypt
    58
  • 69. Ghana
    58
  • 70. Czech Republic
    57
  • 70. Czech Republic
    57
  • 71. Sao Tome and Principe
    57
  • 72. Indonesia
    57
  • 72. Indonesia
    57
  • 73. Argentina
    57
  • 73. Argentina
    57
  • 74. Ivory Coast
    56
  • 74. Ivory Coast
    56
  • 75. Jordan
    56
  • 75. Jordan
    56
  • 76. Chile
    56
  • 77. Afghanistan
    55
  • 78. Hong Kong
    55
  • 79. Mexico
    55
  • 80. Armenia
    55
  • 81. ALA
    54
  • 82. Serbia
    54
  • 83. Greece
    52

EPM7128SLC84-15N Popularity by Region

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  • Product Attributes
  • Descriptions
  • Features
  • CAD Models
Manufacturer: Intel
Series: MAX® 7000S
Packaging: Tray
Part Status: Obsolete
Programmable Type: In System Programmable
Delay Time tpd(1) Max: 15ns
Voltage Supply - Internal: 4.75V ~ 5.25V
Number of Macrocells: 128
Number of I/O: 68
Operating Temperature: 0°C ~ 70°C (TA)
Mounting Type: Surface Mount
Package / Case: 84-LCC (J-Lead)
Supplier Device Package: 84-PLCC (29.31x29.31)
Base Part Number: EPM7128
Number of Logic Elements/Blocks: 8
Number of Gates: 2500

There is no relevant information available for this part yet.

FEATURES

General Description

The MAX 7000 family of high-density, high-performance PLDs is based on Altera’s second-generation MAX architecture. Fabricated with advanced CMOS technology, the EEPROM-based MAX 7000 family provides 600 to 5,000 usable gates, ISP, pin-to-pin delays as fast as 5 ns, and counter speeds of up to 175.4 MHz.

Features...

■ High-performance, EEPROM-based programmable logic devices
(PLDs) based on second-generation MAX® architecture
■ 5.0-V in-system programmability (ISP) through the built-in
IEEE Std. 1149.1 Joint Test Action Group (JTAG) interface available in
MAX 7000S devices
– ISP circuitry compatible with IEEE Std. 1532
■ Includes 5.0-V MAX 7000 devices and 5.0-V ISP-based MAX 7000S
devices
■ Built-in JTAG boundary-scan test (BST) circuitry in MAX 7000S
devices with 128 or more macrocells
■ Complete EPLD family with logic densities ranging from 600 to
5,000 usable gates (see Tables 1 and 2)
■ 5-ns pin-to-pin logic delays with up to 175.4-MHz counter
frequencies (including interconnect)
■ PCI-compliant devices available
■ Open-drain output option in MAX 7000S devices
■ Programmable macrocell flipflops with individual clear, preset,
clock, and clock enable controls
■ Programmable power-saving mode for a reduction of over 50% in
each macrocell
■ Configurable expander product-term distribution, allowing up to
32 product terms per macrocell
■ 44 to 208 pins available in plastic J-lead chip carrier (PLCC), ceramic
pin-grid array (PGA), plastic quad flat pack (PQFP), power quad flat
pack (RQFP), and 1.0-mm thin quad flat pack (TQFP) packages
■ Programmable security bit for protection of proprietary designs
■ 3.3-V or 5.0-V operation
– MultiVoltTM I/O interface operation, allowing devices to
interface with 3.3-V or 5.0-V devices (MultiVolt I/O operation is
not available in 44-pin packages)
– Pin compatible with low-voltage MAX 7000A and MAX 7000B
devices
■ Enhanced features available in MAX 7000E and MAX 7000S devices
– Six pin- or logic-driven output enable signals
– Two global clock signals with optional inversion
– Enhanced interconnect resources for improved routability
– Fast input setup times provided by a dedicated path from I/O
pin to macrocell registers
– Programmable output slew-rate control
■ Software design support and automatic place-and-route provided by
Altera’s development system for Windows-based PCs and Sun
SPARCstation, and HP 9000 Series 700/800 workstations
■ Additional design entry and simulation support provided by EDIF
2 0 0 and 3 0 0 netlist files, library of parameterized modules (LPM),
Verilog HDL, VHDL, and other interfaces to popular EDA tools from
manufacturers such as Cadence, Exemplar Logic, Mentor Graphics,
OrCAD, Synopsys, and VeriBest
■ Programming support
– Altera’s Master Programming Unit (MPU) and programming
hardware from third-party manufacturers program all
MAX 7000 devices
– The BitBlasterTM serial download cable, ByteBlasterMVTM
parallel port download cable, and MasterBlasterTM
serial/universal serial bus (USB) download cable program MAX
7000S devices

There is no relevant information available for this part yet.