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EPM7128AETC100-10N Datasheets | CPLDs (Complex Programmable Logic Devices) IC CPLD 128MC 10NS 100TQFP

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Product Overview

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EPM7128AETC100-10N
Manufacturer Part#: EPM7128AETC100-10N
Product Category: CPLDs (Complex Programmable Logic Devices)
Stock: 270
Manufacturer: Intel
Description: IC CPLD 128MC 10NS 100TQFP
Datasheet: MAX 7000A
Package: 100-TQFP
Minimum: 1
Quantity: 270 PCS

CAD Models

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Product Attributes

Product Attributes Attrinute Value   Search Similar
Manufacturer: Intel
Series: MAX® 7000A
Packaging: Tray
Part Status: Active
Programmable Type: In System Programmable
Delay Time tpd(1) Max: 10ns
Voltage Supply - Internal: 3V ~ 3.6V
Number of Macrocells: 128
Number of I/O: 84
Operating Temperature: 0°C ~ 70°C (TA)
Mounting Type: Surface Mount
Package / Case: 100-TQFP
Supplier Device Package: 100-TQFP (14x14)
Base Part Number: EPM7128
Number of Logic Elements/Blocks: 8
Number of Gates: 2500
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Alternative Models

Part Compare Manufacturers Category Description
Mfr.Part#:EPM7128AETC100-10N Compare: Current Part Manufacturers:Altera Category:CPLDs Description: Cpld max 7000a family 2.5k gates 128 macro cells 98mhz cmos technology 3.3v 100pin tqfp
Mfr.Part#:EPM3128ATC100-10N Compare: EPM7128AETC100-10N VS EPM3128ATC100-10N Manufacturers:Altera Category:CPLDs Description: Cpld max 3000a family 2.5k gates 128 macro cells 98mhz cmos technology 3.3v 100pin tqfp
Mfr.Part#:EPM3128ATC100-10 Compare: EPM7128AETC100-10N VS EPM3128ATC100-10 Manufacturers:Altera Category:CPLDs Description: Cpld max 3000a family 2.5k gates 128 macro cells 98mhz cmos technology 3.3v 100pin tqfp
Mfr.Part#:EPM7128AETC100-7N Compare: EPM7128AETC100-10N VS EPM7128AETC100-7N Manufacturers:Altera Category:CPLDs Description: Cpld max 7000a family 2.5k gates 128 macro cells 129.9mhz cmos technology 3.3v 100pin tqfp

Descriptions

CPLD MAX® 7000A Family 2.5K Gates 128 Macro Cells 98MHz 3.3V 100-Pin TQFP Tray:Verical
IC CPLD 128MC 10NS 100TQFP:Digi-Key

  • Features
  • Product Manufacturer

FEATURES

General Description

MAX 7000A (including MAX 7000AE) devices are high-density, highperformance devices based on Altera’s second-generation MAX architecture. Fabricated with advanced CMOS technology, the EEPROMbased MAX 7000A devices operate with a 3.3-V supply voltage and provide 600 to 10,000 usable gates, ISP, pin-to-pin delays as fast as 4.5 ns, and counter speeds of up to 227.3 MHz. MAX 7000A devices in the -4, -5, -6, -7, and some -10 speed grades are compatible with the timing requirements for 33 MHz operation of the PCI Special Interest Group (PCI SIG) PCI Local Bus Specification, Revision 2.2. See Table 2.

Features...

■ High-performance 3.3-V EEPROM-based programmable logic devices (PLDs) built on second-generation Multiple Array MatriX (MAX®) architecture (see Table 1)
■ 3.3-V in-system programmability (ISP) through the built-in IEEE Std. 1149.1 Joint Test Action Group (JTAG) interface with advanced pin-locking capability
– MAX 7000AE device in-system programmability (ISP) circuitry compliant with IEEE Std. 1532
– EPM7128A and EPM7256A device ISP circuitry compatible with IEEE Std. 1532
■ Built-in boundary-scan test (BST) circuitry compliant with IEEE Std. 1149.1
■ Supports JEDEC Jam Standard Test and Programming Language (STAPL) JESD-71
■ Enhanced ISP features
– Enhanced ISP algorithm for faster programming (excluding EPM7128A and EPM7256A devices)
– ISP_Done bit to ensure complete programming (excluding EPM7128A and EPM7256A devices)
– Pull-up resistor on I/O pins during in-system programming
■ Pin-compatible with the popular 5.0-V MAX 7000S devices
■ High-density PLDs ranging from 600 to 10,000 usable gates
■ Extended temperature range
■ 4.5-ns pin-to-pin logic delays with counter frequencies of up to
227.3 MHz
■ MultiVoltTM I/O interface enables device core to run at 3.3 V, while I/O pins are compatible with 5.0-V, 3.3-V, and 2.5-V logic levels
■ Pin counts ranging from 44 to 256 in a variety of thin quad flat pack (TQFP), plastic quad flat pack (PQFP), ball-grid array (BGA), spacesaving FineLine BGATM, and plastic J-lead chip carrier (PLCC) packages
■ Supports hot-socketing in MAX 7000AE devices
■ Programmable interconnect array (PIA) continuous routing structure for fast, predictable performance
■ PCI-compatible
■ Bus-friendly architecture, including programmable slew-rate control
■ Open-drain output option
■ Programmable macrocell registers with individual clear, preset, clock, and clock enable controls
■ Programmable power-up states for macrocell registers in MAX 7000AE devices
■ Programmable power-saving mode for 50% or greater power reduction in each macrocell
■ Configurable expander product-term distribution, allowing up to 32 product terms per macrocell
■ Programmable security bit for protection of proprietary designs
■ 6 to 10 pin- or logic-driven output enable signals
■ Two global clock signals with optional inversion
■ Enhanced interconnect resources for improved routability
■ Fast input setup times provided by a dedicated path from I/O pin to macrocell registers
■ Programmable output slew-rate control
■ Programmable ground pins

Intel enables designers of electronic systems to rapidly and cost effectively innovate, differentiate, and win in their markets. Intel offers FPGAs, SoCs, CPLDs, and Power Solutions, to provide high-value solutions to customers worldwide.

  • ECCN/UNSPSC
  • Environmental & Export Classifications
  • Documents & Media
Description Value
USHTS: 8542390001
CNHTS: 8542319000
CNHTS: 8542319000
MXHTS: 85423901
MXHTS: 85423901
TARIC: 8542399000
TARIC: 8542399000
ECCN: 3A991.d.2
ECCN: 3A991.d.2
Description Value
RoHS Status: RoHS Compliant
Moisture Sensitivity Level (MSL): 3 (168 Hours)
Documents Media
Datasheets: MAX 7000A
PCN Design/Specification: 100-TQFP Pkg Info
Design Resources: Appearance Update 30/Mar/2015
HTML Datasheet: Mult Series Software Chgs 26/Mar/2020
PCN Packaging: Development Tool Selector
EDA / CAD Models: MAX 7000A
Online Catalog: Mult Dev Label CHG 24/Jan/2020

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In Stock:270
Tips:For larger projects, we will consider discounts from advertised prices.
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