ADSP-2181KSZ-160 Datasheets | Embedded - DSP (Digital Signal Processors) IC DSP CONTROLLER 16BIT 128QFP

DSP Fixed-Point 16bit 40MHz 40MIPS 128-Pin MQFP Tray:Verical
MICROCOMPUTER, 16BIT 40MIPS, SMD; Series:ADSP-21xx; No. of Bits:16; Frequency:40MHz; Supply Voltage:5V; Digital IC Case Style:QFP; No. of Pins:128; Supply Voltage Range:4.5V to 5.5V; Embedded Interface Type:Host Port, Serial; No. of MIPS:40; Operating Temperature Range:0°C to +70°C; MSL:MSL 3 - 168 hours; Base Number:2181; Core Frequency Typ:40MHz; DSP Type:Static CMOS Technology; External Supported Memory:EPROM; Interface:Host Port, Serial; Interface Type:Serial; Package / Case:MQFP; RAM Memory Size:80KB; Supply Voltage Max:5.5V; Supply Voltage Min:4.5V; Termination Type:SMD:element14 APAC
The ADSP-2181 is a single-chip microcomputer optimized for digital signal processing (DSP) and other high speed numeric processing applications. The ADSP-2181 combines the ADSP-2100 family base architecture(three computational units, data address generators and a program sequencer) with two serial ports, a 16-bit internal DMA port, a byte DMA port, a programmable timer, Flag I/O, extensive interrupt capabilities, and on-chip program and data memory. The ADSP-2181 integrates 80K bytes of on-chip memory configured as 16K words (24-bit) of program RAM, and 16K words (16-bit) of data RAM. Power-down circuitry is also provided to meet the low power needs of battery operated portable equipment. The ADSP-2181 is available in 128-pin TQFP and 128- pin PQFP packages. In addition, the ADSP-2181 supports new instructions, which include bit manipulations-bit set, bit clear, bit toggle, bit test- new ALU constants, new multiplication instruction (x squared), biased rounding, result free ALU operations, I/O memory transfers and global interrupt masking for increased flexibility. Fabricated in a high speed, double metal, low power, CMOS process, the ADSP-2181 operates with a 30 ns instruction cycle time. Every instruction can execute in a single processor cycle. The ADSP-2181's flexible architecture and comprehensive instruction set allow the processor to perform multiple operations in parallel. In one processor cycle the ADSP-2181 can: Generate the next program address Fetch the next instruction Perform one or two data moves Update one or two data address pointers Perform a computational operation:Analog Devices