Product Overview
Image: |
![]() |
Manufacturer Part#: | ADSP-21161NCCAZ100 |
Product Category: | Embedded - DSP (Digital Signal Processors) |
Stock: | Yes |
Manufacturer: | Analog Devices Inc. |
Description: | IC DSP CONTROLLER 32BIT 225MBGA |
Datasheet: | ADSP-21161N |
Package: | 225-BGA, CSPBGA |
Minimum: | 1 |
Lead Time: | 3(168 Hours) |
Quantity: | 90 PCS |
Send RFQ: | Inquiry |
Reference Price
Qty | Unit Price | Ext. Price |
1: | 56.35000 | 56.35000 |
10: | 529.33000 | 5293.30000 |
25: | 1280.63000 | 32015.75000 |
100: | 4951.75000 | 495175.00000 |
ADSP-21161NCCAZ100 Images are for reference only.
Product Attributes
Manufacturer: | Analog Devices Inc. |
Series: | SHARC® |
Packaging: | Tray |
Part Status: | Active |
Type: | Floating Point |
Interface: | Host Interface Link Port Serial Port |
Clock Rate: | 100MHz |
Non-Volatile Memory: | External |
On-Chip RAM: | 128kB |
Voltage - I/O: | 3.30V |
Voltage - Core: | 1.80V |
Operating Temperature: | -40°C ~ 105°C (TC) |
Mounting Type: | Surface Mount |
Package / Case: | 225-BGA CSPBGA |
Supplier Device Package: | 225-CSPBGA (17x17) |
Base Part Number: | ADSP-21161 |
Alternative Models
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priceUSD 57.038 |
Max Supply Voltage3.45 V |
Min Supply Voltage3.15 V |
Max Frequency40 MHz |
RAM Size128 kB |
Memory Size- |
InterfaceSSP, Serial |
Data Bus Width32 b |
Number of Pins225 |
Case/PackageBGA |
Authorized Distributors4 |
Memory Type- |
![]() |
priceUSD 65.760 |
Max Supply Voltage3.45 V |
Min Supply Voltage3.15 V |
Max Frequency40 MHz |
RAM Size128 kB |
Memory Size- |
InterfaceSSP, Serial |
Data Bus Width32 b |
Number of Pins225 |
Case/PackageBGA |
Authorized Distributors3 |
Memory Type- |
Frequency44 MHz |
![]() |
priceUSD 15.666 |
Max Supply Voltage3.46 V |
Min Supply Voltage1.43 V |
Max Frequency200 MHz |
RAM Size128 kB |
Memory Size64 kB |
Memory TypeEEPROM |
InterfacePCI |
Data Bus Width32 b |
Number of Pins288 |
Case/PackageBGA |
Authorized Distributors6 |
![]() |
priceUSD 19.221 |
Max Supply Voltage3.46 V |
Min Supply Voltage1.43 V |
Max Frequency200 MHz |
RAM Size128 kB |
Memory Size- |
Memory Type- |
InterfaceI2C, PCI, SPI, UART, USB |
Data Bus Width32 b |
Number of Pins288 |
Case/PackageBGA |
Authorized Distributors5 |
![]() |
priceUSD 18.807 |
Max Supply Voltage3.46 V |
Min Supply Voltage1.43 V |
Max Frequency200 MHz |
RAM Size128 kB |
Memory Size- |
Memory TypeEPROM, SDRAM, SRAM |
InterfacePCI |
Data Bus Width32 b |
Number of Pins288 |
Case/PackageBGA |
Authorized Distributors5 |
Descriptions
DSP Floating-Point 32bit 100MHz 100MIPS 225-Pin CSP-BGA Tray:Chip One Stop Japan
IC DSP CONTROLLER 32BIT 225MBGA:Digi-Key
Dsp, 32/40Bit, 100Mhz, Bga-225:Newark
The ADSP-21161 SHARC® DSP is the newest member of the Super Harvard Architecture (SHARC) family of programmable DSPs. Capable of 600 million math operations per second (MFLOPs), the ADSP-21161 sets a new level of performance for low-cost SHARC DSPs - more than three times the performance for comparable models at about the same price. Its road map includes a cost-effective path to 1200 MFLOPS for $5 per unit and a performance-driven path to 10 GFLOPS and beyond. "This newest edition to the SHARC family will open more possibilities for designers to design-in high performance digital signal processing into client-side applications and should help others reconsider applications they couldn’t do before with a single chip," said Will Strauss, president of Forward Concepts. "Analog Devices will certainly maintain customer loyalty with this road map." The ADSP-21161 DSP is the second member of the SHARC DSP family of 32-bit floating-point programmable DSPs to be based on a SIMD core architecture that is optimized for digital signal processing performance. Like all SHARCs, the ADSP-21161 is code-compatible with all other members of the family and supports both fixed- and floating-point data types. The ADSP-21161 lowers the price for SIMD SHARC DSP performance and is an outstanding DSP solution for many price-sensitive applications. State-of-the-Art Development Tools The ADSP-21161, like all SHARC processors, is supported by a complete set of software and hardware development tools. The VisualDSP++® tool set offered by Analog Devices includes an optimizing C/C++ compiler, integrated development environment (IDE), assembler, linker, splitter and cycle accurate simulator that support both C and assembly debugging. Emulation support is JTAG-based and ADI offers USB, PCI, and Ethernet based emulators. SHARC DSP Roadmap There are two code-compatible paths that the SHARC DSP roadmap will follow. One optimized for high-performance multiprocessing systems and the other for price/performance. Performance is the key for multiprocessing applications and this is the reason that ADI will offer 10 GFLOP SHARC DSPs in the future. On-chip memory sizes will be balanced to match this performance with memories increasing to unprecedented levels (64 Mbit) using newly developed technologies. Industry leading price/performance will be the driver on the other path of the roadmap. In the future, these SHARC DSPs will offer an increase in performance to 1200 MFLOPs while decreasing price to as low as $5.00. This is required to support new technologies that demand substantial signal processing performance at consumer price points.:Analog Devices
IC DSP CONTROLLER 32BIT 225MBGA:Digi-Key
Dsp, 32/40Bit, 100Mhz, Bga-225:Newark
The ADSP-21161 SHARC® DSP is the newest member of the Super Harvard Architecture (SHARC) family of programmable DSPs. Capable of 600 million math operations per second (MFLOPs), the ADSP-21161 sets a new level of performance for low-cost SHARC DSPs - more than three times the performance for comparable models at about the same price. Its road map includes a cost-effective path to 1200 MFLOPS for $5 per unit and a performance-driven path to 10 GFLOPS and beyond. "This newest edition to the SHARC family will open more possibilities for designers to design-in high performance digital signal processing into client-side applications and should help others reconsider applications they couldn’t do before with a single chip," said Will Strauss, president of Forward Concepts. "Analog Devices will certainly maintain customer loyalty with this road map." The ADSP-21161 DSP is the second member of the SHARC DSP family of 32-bit floating-point programmable DSPs to be based on a SIMD core architecture that is optimized for digital signal processing performance. Like all SHARCs, the ADSP-21161 is code-compatible with all other members of the family and supports both fixed- and floating-point data types. The ADSP-21161 lowers the price for SIMD SHARC DSP performance and is an outstanding DSP solution for many price-sensitive applications. State-of-the-Art Development Tools The ADSP-21161, like all SHARC processors, is supported by a complete set of software and hardware development tools. The VisualDSP++® tool set offered by Analog Devices includes an optimizing C/C++ compiler, integrated development environment (IDE), assembler, linker, splitter and cycle accurate simulator that support both C and assembly debugging. Emulation support is JTAG-based and ADI offers USB, PCI, and Ethernet based emulators. SHARC DSP Roadmap There are two code-compatible paths that the SHARC DSP roadmap will follow. One optimized for high-performance multiprocessing systems and the other for price/performance. Performance is the key for multiprocessing applications and this is the reason that ADI will offer 10 GFLOP SHARC DSPs in the future. On-chip memory sizes will be balanced to match this performance with memories increasing to unprecedented levels (64 Mbit) using newly developed technologies. Industry leading price/performance will be the driver on the other path of the roadmap. In the future, these SHARC DSPs will offer an increase in performance to 1200 MFLOPs while decreasing price to as low as $5.00. This is required to support new technologies that demand substantial signal processing performance at consumer price points.:Analog Devices
FEATURES
Change from analog to digital with the ADSP-21161NCCAZ100 digital signal processor from Analog Devices. This DSP processor has an operating temperature range of -40 °C to 105 °C. 100 MHz is its maximum speed. This is a 32 bit processor. This device has a typical operating supply voltage of 1.8|3.3 V. Its minimum operating supply voltage of 1.71|3.13 V, while its maximum is 1.89|3.47 V. It has romless program memory.
ECCN / UNSPSC
Description | Value |
USHTS: | 8542310001 |
CNHTS: | 8542319000 |
MXHTS: | 85423102 |
TARIC: | 8542319000 |
ECCN: | 3A991.a.2 |
Environmental & Export Classifications
Description | Value |
RoHS Status: | ROHS3 Compliant |
Moisture Sensitivity Level (MSL): | 3 (168 Hours) |
Documents & Media
Datasheets: | ADSP-21161N |
Design Resources: | Development Tool Selector |
Featured Product: | Analog Devices IoT and the Intelligence of Things |
Video File: | SHARC Audio Module |
Other Related Documents: | SHARC Audio Module |
PCN Assembly/Origin: | SHARC Audio Module |
EDA / CAD Models: | An Almost Pure DDS Sine Wave Tone Generator |
Online Catalog: | ADSP-21161N Site Transfer 30/Apr/2020 |
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- 5962-88565022A
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- Product Attributes
- Descriptions
- Features
- CAD Models
ADSP-21161NCCAZ100 Popularity by Region
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IC DSP CONTROLLER 32BIT 225MBGA
Manufacturer: | Analog Devices Inc. |
Series: | SHARC® |
Packaging: | Tray |
Part Status: | Active |
Type: | Floating Point |
Interface: | Host Interface Link Port Serial Port |
Clock Rate: | 100MHz |
Non-Volatile Memory: | External |
On-Chip RAM: | 128kB |
Voltage - I/O: | 3.30V |
Voltage - Core: | 1.80V |
Operating Temperature: | -40°C ~ 105°C (TC) |
Mounting Type: | Surface Mount |
Package / Case: | 225-BGA CSPBGA |
Supplier Device Package: | 225-CSPBGA (17x17) |
Base Part Number: | ADSP-21161 |
DSP Floating-Point 32bit 100MHz 100MIPS 225-Pin CSP-BGA Tray:Chip One Stop Japan
IC DSP CONTROLLER 32BIT 225MBGA:Digi-Key
Dsp, 32/40Bit, 100Mhz, Bga-225:Newark
The ADSP-21161 SHARC® DSP is the newest member of the Super Harvard Architecture (SHARC) family of programmable DSPs. Capable of 600 million math operations per second (MFLOPs), the ADSP-21161 sets a new level of performance for low-cost SHARC DSPs - more than three times the performance for comparable models at about the same price. Its road map includes a cost-effective path to 1200 MFLOPS for $5 per unit and a performance-driven path to 10 GFLOPS and beyond. "This newest edition to the SHARC family will open more possibilities for designers to design-in high performance digital signal processing into client-side applications and should help others reconsider applications they couldn’t do before with a single chip," said Will Strauss, president of Forward Concepts. "Analog Devices will certainly maintain customer loyalty with this road map." The ADSP-21161 DSP is the second member of the SHARC DSP family of 32-bit floating-point programmable DSPs to be based on a SIMD core architecture that is optimized for digital signal processing performance. Like all SHARCs, the ADSP-21161 is code-compatible with all other members of the family and supports both fixed- and floating-point data types. The ADSP-21161 lowers the price for SIMD SHARC DSP performance and is an outstanding DSP solution for many price-sensitive applications. State-of-the-Art Development Tools The ADSP-21161, like all SHARC processors, is supported by a complete set of software and hardware development tools. The VisualDSP++® tool set offered by Analog Devices includes an optimizing C/C++ compiler, integrated development environment (IDE), assembler, linker, splitter and cycle accurate simulator that support both C and assembly debugging. Emulation support is JTAG-based and ADI offers USB, PCI, and Ethernet based emulators. SHARC DSP Roadmap There are two code-compatible paths that the SHARC DSP roadmap will follow. One optimized for high-performance multiprocessing systems and the other for price/performance. Performance is the key for multiprocessing applications and this is the reason that ADI will offer 10 GFLOP SHARC DSPs in the future. On-chip memory sizes will be balanced to match this performance with memories increasing to unprecedented levels (64 Mbit) using newly developed technologies. Industry leading price/performance will be the driver on the other path of the roadmap. In the future, these SHARC DSPs will offer an increase in performance to 1200 MFLOPs while decreasing price to as low as $5.00. This is required to support new technologies that demand substantial signal processing performance at consumer price points.:Analog Devices
IC DSP CONTROLLER 32BIT 225MBGA:Digi-Key
Dsp, 32/40Bit, 100Mhz, Bga-225:Newark
The ADSP-21161 SHARC® DSP is the newest member of the Super Harvard Architecture (SHARC) family of programmable DSPs. Capable of 600 million math operations per second (MFLOPs), the ADSP-21161 sets a new level of performance for low-cost SHARC DSPs - more than three times the performance for comparable models at about the same price. Its road map includes a cost-effective path to 1200 MFLOPS for $5 per unit and a performance-driven path to 10 GFLOPS and beyond. "This newest edition to the SHARC family will open more possibilities for designers to design-in high performance digital signal processing into client-side applications and should help others reconsider applications they couldn’t do before with a single chip," said Will Strauss, president of Forward Concepts. "Analog Devices will certainly maintain customer loyalty with this road map." The ADSP-21161 DSP is the second member of the SHARC DSP family of 32-bit floating-point programmable DSPs to be based on a SIMD core architecture that is optimized for digital signal processing performance. Like all SHARCs, the ADSP-21161 is code-compatible with all other members of the family and supports both fixed- and floating-point data types. The ADSP-21161 lowers the price for SIMD SHARC DSP performance and is an outstanding DSP solution for many price-sensitive applications. State-of-the-Art Development Tools The ADSP-21161, like all SHARC processors, is supported by a complete set of software and hardware development tools. The VisualDSP++® tool set offered by Analog Devices includes an optimizing C/C++ compiler, integrated development environment (IDE), assembler, linker, splitter and cycle accurate simulator that support both C and assembly debugging. Emulation support is JTAG-based and ADI offers USB, PCI, and Ethernet based emulators. SHARC DSP Roadmap There are two code-compatible paths that the SHARC DSP roadmap will follow. One optimized for high-performance multiprocessing systems and the other for price/performance. Performance is the key for multiprocessing applications and this is the reason that ADI will offer 10 GFLOP SHARC DSPs in the future. On-chip memory sizes will be balanced to match this performance with memories increasing to unprecedented levels (64 Mbit) using newly developed technologies. Industry leading price/performance will be the driver on the other path of the roadmap. In the future, these SHARC DSPs will offer an increase in performance to 1200 MFLOPs while decreasing price to as low as $5.00. This is required to support new technologies that demand substantial signal processing performance at consumer price points.:Analog Devices
FEATURES
Change from analog to digital with the ADSP-21161NCCAZ100 digital signal processor from Analog Devices. This DSP processor has an operating temperature range of -40 °C to 105 °C. 100 MHz is its maximum speed. This is a 32 bit processor. This device has a typical operating supply voltage of 1.8|3.3 V. Its minimum operating supply voltage of 1.71|3.13 V, while its maximum is 1.89|3.47 V. It has romless program memory.
There is no relevant information available for this part yet.