The TPS3808G01DBVT is a Low Quiescent Current Programmable Delay Supervisory Circuit that monitors system voltages from 0.4 to 5V, asserting an open-drain RESET signal when the SENSE voltage drops below a preset threshold or when the manual reset (MR) pin drops to a logic low. The RESET output remains low for the user-adjustable delay time after the SENSE voltage and manual reset (MR) return above the respective thresholds. The TPS3808 device uses a precision reference to achieve 0.5% threshold accuracy for VIT
Control the core processor in case of failure with the V62/08607-01XE microprocessor supervisory circuit, developed by Texas Instruments. Tape and reel packaging will encase this product during shipment, in order to ensure safe delivery and enable quick mounting of components. This device has a minimum operating supply voltage of 1.7 V and a maximum of 6.5 V. This part has an operating temperature range of -55 °C to 125 °C.
DESCRIPTION The TPS3808xxx family of microprocessor supervisory circuits monitor system voltages from 0.4V to 5.0V, asserting an open drain RESET signal when the SENSE voltage drops below a preset threshold or when the manual reset (MR) pin drops to a logic low. The RESET output remains low for the user adjustable delay time after the SENSE voltage and manual reset (MR) return above their thresholds. FEATURES • Power-On Reset Generator with Adjustable Delay Time: 1.25ms to 10s • Very Low Quiescent Current: 2.4µA typ • High Threshold Accuracy: 0.5% typ • Fixed Threshold Voltages for Standard Voltage Rails from 0.9V to 5V and Adjustable Voltage Down to 0.4V Are Available • Manual Reset (MR) Input • Open-Drain RESET Output • Temperature Range: –40°C to +125°C • Small SOT23 and 2mm × 2mm QFN Packages APPLICATIONS • DSP or Microcontroller Applications • Notebook/Desktop Computers • PDAs/Hand-Held Products • Portable/Battery-Powered Products • FPGA/ASIC Applications