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SN74LVC2G34DRLR vs SN74LVC2G34DRLRG4 Comparison

  • Hide Shared Attributes
    SN74LVC2G34DRLR
    SN74LVC2G34DRLR
    SN74LVC2G34DRLRG4
    SN74LVC2G34DRLRG4
  • Part No.
    SN74LVC2G34DRLR
    SN74LVC2G34DRLRG4
  • Description
    Buffer 2CH Non-Inverting CMOS 6Pin SOT T/R
    Buffer 2CH Non-Inverting CMOS 6Pin SOT
  • Manufacturer
    TI
    TI
  • Classification
    Logic ICs
    Buffer Gates
  • Reference Price(USD)
    $0.143
    -
  • Inventory(pcs)
    4k
    6.8k
  • Case/Package
    SOT-563
    SOT-553-6
  • Number of Pins
    6
    6
  • Number of Bits
    2
    -
  • Number of Channels
    2
    2
  • Propagation Delay Max (tpd)
    3.20 ns
    3.20 ns
  • Number of Gates
    2
    2
  • Number of Positions
    6
    -
  • Supply Voltage (DC)
    5.00 V, 5.50 V (max)
    -
  • ECCN Code
    EAR99
    -
  • Number of Outputs
    2
    -
  • Operating Temperature
    -40℃ ~ 125℃ (TA)
    -
  • Size-Length
    -
    1.6 mm
  • Size-Width
    -
    1.2 mm
  • Size-Height
    -
    0.55 mm
  • Mounting Style
    Surface Mount
    Surface Mount
  • Packaging
    Tape & Reel (TR)
    Tape & Reel (TR)
  • REACH SVHC Compliance
    No SVHC
    -
  • Lead-Free Status
    Lead Free
    Lead Free
  • RoHS
    RoHS Compliant
    RoHS Compliant
  • Product Lifecycle Status
    Active
    Active
  • Number of Inputs
    2
    -
  • Supply Voltage (Min)
    1.65 V
    1.65 V
  • Operating Temperature (Max)
    85 ℃
    85 ℃
  • Operating Temperature (Min)
    -40 ℃
    40 ℃
  • REACH SVHC Compliance Edition
    2015/06/15
    -
  • Supply Voltage
    1.65V ~ 5.5V
    -
  • Supply Voltage (Max)
    5.5 V
    5.5 V
  • Industrial-Spec
    Yes
    -
  • Overview
    SN74LVC2G34DRLR Product overview

    The SN74LVC2G34DRLR is a dual Buffer Gate designed for 1.65 to 5.5V VCC operation. This device performs the Boolean function Y = A in positive logic. This device is fully specified for partial-power-down applications using IOFF. The IOFF circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

    .
    IOFF Supports live insertion, partial-power-down mode and back-drive protection
    .
    Can be used as a down translator to translate inputs from 5.5V down to the VCC level
    .
    Latch-up performance exceeds 250mA per JESD 17
    .
    Inputs accept voltages to 5.5V
    .
    4.1ns at 3.3V Propagation delay (tpd)
    .
    10µA ICC Low power consumption
    .
    ±24mA Output drive at 3.3 V
    .
    <0.8V at VCC = 3.3V, TA = 25°C VOLP (output ground bounce)
    .
    >2V at VCC = 3.3V, TA = 25°C VOHV (output VOH undershoot)
    .
    Green product and no Sb/Br
    View all
    View all

SN74LVC2G34DRLR Alternative Parts

Image Part Compare Manufacturer Category Description
Image:SN74LVC2G34DRLR Mfr.Part#:SN74LVC2G34DRLR Compare: Current Part Manufacturers:TI Category:Logic ICs Description:Buffer 2CH Non-Inverting CMOS 6Pin SOT T/R
Image:SN74LVC2G34DRLRG4 Mfr.Part#:SN74LVC2G34DRLRG4 Compare: SN74LVC2G34DRLR VS SN74LVC2G34DRLRG4 Manufacturers:TI Category:Buffer Gates Description:Buffer 2CH Non-Inverting CMOS 6Pin SOT