The SN74LVC1G97DBVR is a configurable Multiple-Function Gate. The output state is determined by eight patterns of 3-bit input. The user can choose the logic functions MUX and or, NAND, NOR, inverter and non-inverter. All inputs can be connected to VCC or GND. This configurable multiple-function gate is designed for 1.65 to 5.5V VCC operation. This device functions as an independent gate, but because of Schmitt action, it may have different input threshold levels for positive-going (VT+) and negative-going (VT-) signals. This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.
DESCRIPTION/ORDERING INFORMATION This configurable multiple-function gate is designed for 1.65-V to 5.5-V VCC operation. The SN74LVC1G97 features configurable multiple functions. The output state is determined by eight patterns of 3-bit input. The user can choose the logic functions MUX, AND, OR, NAND, NOR, inverter, and noninverter. All inputs can be connected to VCC or GND. FEATURES • Available in the Texas Instruments NanoStar™ and NanoFree™ Packages • Supports 5-V VCC Operation • Inputs Accept Voltages to 5.5 V • Max tpd of 6.3 ns at 3.3 V • Low Power Consumption, 10-µA Max ICC • ±24-mA Output Drive at 3.3 V • Ioff Supports Partial-Power-Down Mode Operation • Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II • ESD Protection Exceeds JESD 22 – 2000-V Human-Body Model (A114-A) – 200-V Machine Model (A115-A) – 1000-V Charged-Device Model (C101) • Choose From Nine Specific Logic Functions
The 74LVC1G97GV is a low-power configurable Multiple Function Gate with schmitt-trigger inputs. The device can be configured as any of the following logic functions MUX and or, NAND, NOR, inverter and buffer, using the 3-bit input. All inputs can be connected to VCC or GND. Inputs can be driven from either 3.3 or 5V devices. This feature allows the use of this device as translators in mixed 3.3 and 5V environments. This device is fully specified for partial power-down applications using Ioff. The Ioff circuitry disables the output, preventing the damaging backflow current through the device when it is powered down.