High-Performance RISC CPU: • C Compiler Optimized Architecture: \- Optional extended instruction set designed to optimize re-entrant code • Up to 1024 bytes Data EEPROM • Up to 64 Kbytes Linear Program Memory Addressing • Up to 3936 bytes Linear Data Memory Addressing • Up to 16 MIPS Operation • 16-bit Wide Instructions, 8-bit Wide Data Path • Priority Levels for Interrupts • 31-Level, Software Accessible Hardware Stack • 8 x 8 Single-Cycle Hardware Multiplier
The PIC18F45K20-I/PT is a 32kB Flash Microcontroller with XLP technology. The PIC18F45K20 family introduces design enhancements that make this microcontroller a logical choice for many high-performance and power sensitive applications. All of the devices in the PIC18F45K20 family incorporate a range of features that can significantly reduce power consumption during operation. The flash cells for both program memory and data EEPROM are rated to last for many thousands of erase/write cycles - up to 10K for program memory and 100K for EEPROM. Data retention without refresh is conservatively estimated to be greater than 40 years. The self-programmability can write to their own program memory spaces under internal software control. By using a bootloader routine located in the protected Boot Block at the top of program memory, it becomes possible to create an application that can update itself in the field.