Overview The PCA9515A is a CMOS integrated circuit intended for application in I²C-bus and SMBus systems. While retaining all the operating modes and features of the I²C-bus system, it permits extension of the I²C-bus by buffering both the data (SDA) and the clock (SCL) lines, thus enabling two buses of 400 pF. The I²C-bus capacitance limit of 400 pF restricts the number of devices and bus length. Using the PCA9515A enables the system designer to isolate two halves of a bus, thus more devices or longer length can be accommodated. It can also be used to run two buses, one at 5 V and the other at 3.3 V or a 400 kHz and 100 kHz bus, where the 100 kHz bus is isolated when 400 kHz operation of the other is required.
The PCA9515D is a BiCMOS I²C-Bus Repeater intended for application in I²C-bus and SMBus systems. While retaining all the operating modes and features of the I²C-bus system, it permits extension of the I²C-bus by buffering both the data (SDA) and the clock (SCL) lines, thus enabling two buses of 400pF. The I²C-bus capacitance limit of 400pF restricts the number of devices and bus length. The repeater enables the system designer to isolate two halves of a bus, thus more devices or longer length can be accommodated.
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