The TLC555CP is a monolithic timing circuit fabricated using the TI LinCMOS™ process. The timer is fully compatible with CMOS, TTL, and MOS logic and operates at frequencies up to 2MHz. Because of its high input impedance, this device uses smaller timing capacitors than those used by the NE555. As a result, more accurate time delays and oscillations are possible. Power consumption is low across the full range of power supply voltage.
Description The LMC555 device is a CMOS version of the industry standard 555 series general-purpose timers. In addition to the standard package (SOIC, VSSSOP, and PDIP) the LMC555 is also available in a chipsized package (8-bump DSBGA) using TI"s DSBGA package technology. Features • Industry"s Fastest Astable Frequency of 3 MHz • Available in Industry"s Smallest 8-Bump DSBGA Package (1.43mm × 1.41mm) • Less Than 1 mW Typical Power Dissipation at 5 V Supply • 1.5 V Supply Operating Voltage Ensured • Output Fully Compatible With TTL and CMOS Logic at 5 V Supply • Tested to −10 mA, 50 mA Output Current Levels • Reduced Supply Current Spikes During Output Transitions • Extremely Low Reset, Trigger, and Threshold Currents • Excellent Temperature Stability • Pin-for-Pin Compatible With 555 Series of Timers Applications • Precision Timing • Pulse Generation • Sequential Timing • Time Delay Generation • Pulse Width Modulation • Pulse Position Modulation • Linear Ramp Generators
The NE555P are precision timing circuits capable of producing accurate time delays or oscillation. In the time-delay or monostable mode of operation, the timed interval is controlled by a single external resistor and capacitor network. In the a stable mode of operation, the frequency and duty cycle can be controlled independently with two external resistors and a single external capacitor. The threshold and trigger levels normally are two-thirds and one-third, respectively, of VCC. These levels can be altered by use of the control-voltage terminal. When the trigger input falls below the trigger level, the flip-flop is set, and the output goes high. If the trigger input is above the trigger level and the threshold input is above the threshold level, the flip-flop is reset and the output is low.