The CD74HCT238E is a 3-to-8 high speed CMOS Decoder/Demultiplexer well suited to memory address decoding or data routing applications. It features low power consumption usually associated with CMOS circuitry, yet have speeds comparable to low power Schottky TTL logic. It has three binary select inputs (A0, A1 and A2). If the device is enabled, these inputs determine which of the normally low outputs of the HCT238 series will go high. Two active low and one active high enables (E1\, E2\ and E3) are provided to ease the cascading of decoders. The decoder"s 8 outputs can drive 10 low power Schottky TTL equivalent loads.
**_Description_** The ’HC138, ’HC238, ’HCT138, and ’HCT238 are high-speed silicon-gate CMOS decoders well suited to memory address decoding or data-routing applications. Both circuits feature low power consumption usually associated with CMOS circuitry, yet have speeds comparable to low-power Schottky TTL logic. Both circuits have three binary select inputs (A0, A1, and A2). If the device is enabled, these inputs determine which one of the eight normally high outputs of the HC/HCT138 series go low or which of the normally low outputs of the HC/HCT238 series go high.
The 74HCT238N is a 3-to-8 Decoder/Demultiplexer decodes three binary weighted address inputs (A0, A1 and A2) to eight mutually exclusive outputs (Y0 to Y7). The device features three enable inputs (E1\ and E2\ and E3). Every output will be low unless E1\ and E2\ are low and E3 is high. This multiple enable function allows easy parallel expansion to a 1-of-32 (5 to 32 lines) decoder with just four 238 ICs and one inverter. The 238 can be used as an eight output demultiplexer by using one of the active low enable inputs as the data input and the remaining enable inputs as strobes. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC.