GENERAL DESCRIPTION The ADSP-218xN series consists of six single chip microcomputers optimized for digital signal processing applica tions. The high-level block diagram for the ADSP-218xN series members appears on the previous page. All series members are pin-compatible and are differentiated solely by the amount of on-chip SRAM. This feature, combined with ADSP-21xx code compatibility, provides a great deal of flexibility in the design decision. PERFORMANCE FEATURES 12.5 ns Instruction Cycle Time @1.8 V (Internal), 80 MIPS Sustained Performance Single-Cycle Instruction Execution Single-Cycle Context Switch 3-Bus Architecture Allows Dual Operand Fetches in Every Instruction Cycle Multifunction Instructions Power-Down Mode Featuring Low CMOS Standby Power Dissipation with 200 CLKIN Cycle Recovery from Power-Down Condition Low Power Dissipation in Idle Mode INTEGRATION FEATURES ADSP-2100 Family Code Compatible (Easy to Use Algebraic Syntax), with Instruction Set Extensions Up to 256K Bytes of On-Chip RAM, Configured as Up to 48K Words Program Memory RAM Up to 56K Words Data Memory RAM Dual-Purpose Program Memory for Both Instruction and Data Storage Independent ALU, Multiplier/Accumulator, and Barrel Shifter Computational Units Two Independent Data Address Generators Powerful Program Sequencer Provides Zero Overhead Looping Conditional Instruction Execution Programmable 16-Bit Interval Timer with Prescaler 100-Lead LQFP and 144-Ball Mini-BGA
If you are a signal processing engineer then this ADSP-2186NKSTZ-320 digital signal processor from Analog Devices is going to be a must. This DSP processor has an operating temperature range of 0 °C to 70 °C. 80 MHz is its maximum speed. This is a 16 bit processor. This device has a typical operating supply voltage of 1.8|2.5|3.3 V. Its minimum operating supply voltage of 1.71 V, while its maximum is 1.89|3.6 V. It has romless program memory.
The ADSP-2186NBSTZ-320 is a single-chip Digital Signal Processing Microcomputer is pin-compatible and is differentiated solely by the amount of on-chip SRAM. This feature, combined with ADSP-21xx code compatibility, provides a great deal of flexibility in the design decision. ADSP-2186N series members combine the ADSP-2100 family base architecture (three computational units, data address generators and a program sequencer) with two serial ports, a 16-bit internal DMA port, a byte DMA port, a programmable timer, Flag I/O, extensive interrupt capabilities and on-chip program and data memory. ADSP-2186N series members integrate up to 256K bytes of on-chip memory configured as up to 48K words (24-bit) of program RAM and up to 56K words (16-bit) of data RAM. Power down circuitry is also provided to meet the low power needs of battery-operated portable equipment.