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AD9517-0ABCPZ-RL7 vs AD9517-1ABCPZ vs AD9517-3ABCPZ-RL7 Comparison

  • Hide Shared Attributes
    AD9517-0ABCPZ-RL7
    AD9517-0ABCPZ-RL7
    AD9517-1ABCPZ
    AD9517-1ABCPZ
    AD9517-3ABCPZ-RL7
    AD9517-3ABCPZ-RL7
  • Part No.
    AD9517-0ABCPZ-RL7
    AD9517-1ABCPZ
    AD9517-3ABCPZ-RL7
  • Description
    Clock Generator -40℃ to 85℃ 48Pin LFCSP EP T/R
    Clock Generator 0MHz to 250MHz-IN 2950MHz-OUT 48Pin LFCSP EP Tray
    Clock Generator -40℃ to 85℃ 48Pin LFCSP EP T/R
  • Manufacturer
    Adi
    Adi
    Adi
  • Classification
    Clock Generators
    Clock & Timing
    Clock Generators
  • Reference Price(USD)
    $9.416
    $8.200
    $10.544
  • Inventory(pcs)
    0
    2.4k
    0
  • Case/Package
    LFCSP-48
    LFCSP-48
    LFCSP-48
  • Number of Pins
    48
    48
    48
  • Frequency
    -
    2.65 GHz
    -
  • Number of Circuits
    1
    1
    1
  • Number of Positions
    -
    48
    -
  • ECCN Code
    EAR99
    EAR99
    EAR99
  • Supply Voltage (DC)
    -
    3.13V (min)
    -
  • Number of Outputs
    -
    12
    -
  • Operating Temperature
    -40℃ ~ 85℃
    -40℃ ~ 85℃
    -40℃ ~ 85℃
  • Size-Length
    -
    7.1 mm
    -
  • Size-Width
    -
    7.1 mm
    -
  • Size-Height
    -
    0.95 mm
    0.83 mm
  • Mounting Style
    Surface Mount
    Surface Mount
    Surface Mount
  • Packaging
    Tape & Reel (TR)
    Tray
    Tape & Reel (TR)
  • REACH SVHC Compliance
    -
    No SVHC
    -
  • Lead-Free Status
    Lead Free
    Lead Free
    Lead Free
  • RoHS
    RoHS Compliant
    RoHS Compliant
    RoHS Compliant
  • Product Lifecycle Status
    Active
    Active
    Active
  • Operating Temperature (Max)
    85 ℃
    85 ℃
    85 ℃
  • Operating Temperature (Min)
    -40 ℃
    -40 ℃
    -40 ℃
  • Supply Voltage
    3.135V ~ 3.465V
    3.135V ~ 3.465V
    3.135V ~ 3.465V
  • Aerospace-Spec
    Yes
    Yes
    Yes
  • Supply Voltage (Max)
    -
    3.465 V
    -
  • Supply Voltage (Min)
    -
    3.135 V
    -
  • Overview
    AD9517-0ABCPZ-RL7 Product overview

    Product Details The AD9517-01 provides a multi-output clock distribution function with subpicosecond jitter performance, along with an on-chip PLL and VCO. The on-chip VCO tunes from 2.55 GHz to 2.95 GHz. Optionally, an external VCO/VCXO of up to 2.4 GHz can be used. The AD9517-0 emphasizes low jitter and phase noise to maximize data converter performance, and it can benefit other applications with demanding phase noise and jitter requirements. The AD9517-0 features four LVPECL outputs (in two pairs) and four LVDS outputs (in two pairs). Each LVDS output can be reconfigured as two CMOS outputs. The LVPECL outputs operate to 1.6 GHz, the LVDS outputs operate to 800 MHz, and the CMOS outputs operate to 250 MHz. For applications that require additional outputs, a crystal reference input, zero-delay, or EEPROM for automatic configuration at startup, the AD9520 and AD9522 are available. In addition, the AD9516 and AD9518 are similar to the AD9517 but have a different combination of outputs. Each pair of outputs has dividers that allow both the divide ratio and coarse delay (or phase) to be set. The range of division for the LVPECL outputs is 1 to 32. The LVDS/CMOS outputs allow a range of divisions up to a maximum of 1024. The AD9517-0 is available in a 48-lead LFCSP and can be operated from a single 3.3 V supply. An external VCO, which requires an extended voltage range, can be accommodated by connecting the charge pump supply (VCP) to 5 V. A separate LVPECL power supply can be from 2.5 V to 3.3 V (nominal). The AD9517-0 is specified for operation over the industrial range of −40°C to +85°C.

    .
    *Applications**
    .
    Low jitter, low phase noise clock distribution
    .
    10/40/100 Gb/sec networking line cards, including SONET, Synchronous Ethernet, OTU2/3/4
    .
    Forward error correction (G.710)
    .
    Clocking high speed ADCs, DACs, DDSs, DDCs, DUCs, MxFEs
    .
    High performance wireless transceivers
    .
    ATE and high performance instrumentation
    1AD9517 is used throughout to refer to all the members of the AD9517 family. However, when AD9517-0 is used, it is referring to that specific member of the AD9517 family. ### Features and Benefits
    .
    **Low phase noise, phase-locked loop 
    .
    *On-chip VCO tunes from 2.55 GHz to 2.95 GHz
    .
    External VCO/VCXO to 2.4 GHz optional
    .
    1 differential or 2 single-ended reference inputs
    .
    Reference monitoring capability
    .
    **2 pairs of 1.6 GHz LVPECL outputs
    .
    *Each output pair shares a 1-to-32 divider with coarse phase delay
    Additive output jitter: 225 fs rms Channel-to-channel skew paired outputs of <10 ps
    .
    **2 pairs of 800 MHz LVDS clock outputs
    .
    *Each output pair shares two cascaded 1-to-32 dividers with coarse phase delay
    Additive output jitter: 275 fs rms Fine delay adjust (Δt) on each LVDS output
    .
    Each LVDS output can be reconfigured as two 250 MHz CMOS outputs
    .
    Automatic synchronization of all outputs on power-up
    .
    See datasheet for additional features
    View all
    AD9517-1ABCPZ Product overview

    Product Details The AD9517-11 provides a multi-output clock distribution function with subpicosecond jitter performance, along with an on-chip PLL and VCO. The on-chip VCO tunes from 2.30 GHz to 2.65 GHz. Optionally, an external VCO/VCXO of up to 2.4 GHz can be used. The AD9517-1 emphasizes low jitter and phase noise to maximize data converter performance, and it can benefit other applications with demanding phase noise and jitter requirements. The AD9517-1 features four LVPECL outputs (in two pairs) and four LVDS outputs (in two pairs). Each LVDS output can be reconfigured as two CMOS outputs. The LVPECL outputs operate to 1.6 GHz, the LVDS outputs operate to 800 MHz, and the CMOS outputs operate to 250 MHz. For applications that require additional outputs, a crystal reference input, zero-delay, or EEPROM for automatic configuration at startup, the AD9520 and AD9522 are available. In addition, the AD9516 and AD9518 are similar to the AD9517 but have a different combination of outputs. Each pair of outputs has dividers that allow both the divide ratio and coarse delay (or phase) to be set. The range of division for the LVPECL outputs is 1 to 32. The LVDS/CMOS outputs allow a range of divisions up to a maximum of 1024. The AD9517-1 is available in a 48-lead LFCSP and can be operated from a single 3.3 V supply. An external VCO, which requires an extended voltage range, can be accommodated by connecting the charge pump supply (VCP) to 5 V. A separate LVPECL power supply can be from 2.5 V to 3.3 V (nominal). The AD9517-1 is specified for operation over the industrial range of −40°C to +85°C.

    .
    *Applications**
    .
    Low jitter, low phase noise clock distribution
    .
    10/40/100 Gb/sec networking line cards, including SONET, Synchronous Ethernet, OTU2/3/4
    .
    Forward error correction (G.710)
    .
    Clocking high speed ADCs, DACs, DDSs, DDCs, DUCs, MxFEs
    .
    High performance wireless transceivers
    .
    ATE and high performance instrumentation
    1 AD9517 is used throughout the data sheet to refer to all the members of the AD9517 family. However, when AD9517-1 is used, it is referring to that specific member of the AD9517 family. ### Features and Benefits
    .
    **Low phase noise, phase-locked loop
    .
    *On-chip VCO tunes from 2.30 GHz to 2.65 GHz
    .
    External VCO/VCXO to 2.4 GHz optional
    .
    1 differential or 2 single-ended reference inputs
    .
    Reference monitoring capability
    .
    **2 pairs of 1.6 GHz LVPECL outputs
    .
    *Each output pair shares a 1-to-32 divider with coarse phase delay
    Additive output jitter: 225 fs rms Channel-to-channel skew paired outputs of <10 ps
    .
    **2 pairs of 800 MHz LVDS clock outputs**
    .
    Each output pair shares two cascaded 1-to-32 dividers with coarse phase delay
    Additive output jitter: 275 fs rms Fine delay adjust (Δt) on each LVDS output
    .
    Each LVDS output can be reconfigured as two 250 MHz CMOS outputs
    .
    Automatic synchronization of all outputs on power-up
    .
    See datasheet for additional features
    View all
    AD9517-3ABCPZ-RL7 Product overview

    Product Details The AD9517-31 provides a multi-output clock distribution function with subpicosecond jitter performance, along with an on-chip PLL and VCO. The on-chip VCO tunes from 1.75 GHz to 2.25 GHz. Optionally, an external VCO/VCXO of up to 2.4 GHz can be used. The AD9517-3 emphasizes low jitter and phase noise to maximize data converter performance, and it can benefit other applications with demanding phase noise and jitter requirements. The AD9517-3 features four LVPECL outputs (in two pairs) and four LVDS outputs (in two pairs). Each LVDS output can be reconfigured as two CMOS outputs. The LVPECL outputs operate to 1.6 GHz, the LVDS outputs operate to 800 MHz, and the CMOS outputs operate to 250 MHz. For applications that require additional outputs, a crystal reference input, zero-delay, or EEPROM for automatic configuration at startup, the AD9520 and AD9522 are available. In addition, the AD9516 and AD9518 are similar to the AD9517 but have a different combination of outputs. Each pair of outputs has dividers that allow both the divide ratio and coarse delay (or phase) to be set. The range of division for the LVPECL outputs is 1 to 32. The LVDS/CMOS outputs allow a range of divisions up to a maximum of 1024. The AD9517-3 is available in a 48-lead LFCSP and can be operated from a single 3.3 V supply. An external VCO, which requires an extended voltage range, can be accommodated by connecting the charge pump supply (VCP) to 5 V. A separate LVPECL power supply can be from 2.5 V to 3.3 V (nominal). The AD9517-3 is specified for operation over the industrial range of −40°C to +85°C.

    .
    *Applications**
    .
    Low jitter, low phase noise clock distribution
    .
    10/40/100 Gb/sec networking line cards, including SONET, Synchronous Ethernet, OTU2/3/4
    .
    Forward error correction (G.710)
    .
    Clocking high speed ADCs, DACs, DDSs, DDCs, DUCs, MxFEs
    .
    High performance wireless transceivers
    .
    ATE and high performance instrumentation
    1 AD9517 is used throughout to refer to all the members of the AD9517 family. However, when AD9517-3 is used, it is referring to that specific member of the AD9517 family. ### Features and Benefits
    .
    **Low phase noise, phase-locked loop (PLL)
    .
    *On-chip VCO tunes from 1.75 GHz to 2.25 GHz
    .
    External VCO/VCXO to 2.4 GHz optional
    .
    1 differential or 2 single-ended reference inputs
    .
    Reference monitoring capability
    .
    **2 pairs of 1.6 GHz LVPECL outputs
    .
    *Each output pair shares a 1-to-32 divider with coarse phase delay
    Additive output jitter: 225 fs rms Channel-to-channel skew paired outputs of <10 ps
    .
    **2 pairs of 800 MHz LVDS clock outputs
    .
    *Each output pair shares two cascaded 1-to-32 dividers with coarse phase delay
    Additive output jitter: 275 fs rms Fine delay adjust (Δt) on each LVDS output
    .
    Each LVDS output can be reconfigured as two 250 MHz CMOS outputs
    .
    Automatic synchronization of all outputs on power-up
    .
    See datasheet for additonal features
    View all

AD9517-1ABCPZ Alternative Parts

Image Part Compare Manufacturer Category Description
Image:AD9517-1ABCPZ Mfr.Part#:AD9517-1ABCPZ Compare: Current Part Manufacturers:Adi Category:Clock & Timing Description:Clock generator 0mhz to 250mhz-in 2950mhz-out 48pin lfcsp ep tray
Image:AD9517-3ABCPZ-RL7 Mfr.Part#:AD9517-3ABCPZ-RL7 Compare: AD9517-1ABCPZ VS AD9517-3ABCPZ-RL7 Manufacturers:Adi Category:Clock Generators Description:Clock generator -40℃ to 85℃ 48pin lfcsp ep t/r
Image:AD9517-4ABCPZ-RL7 Mfr.Part#:AD9517-4ABCPZ-RL7 Compare: AD9517-1ABCPZ VS AD9517-4ABCPZ-RL7 Manufacturers:Adi Category:Clock Generators Description:Clock generator -40℃ to 85℃ 48pin lfcsp ep t/r
Image:AD9517-0ABCPZ-RL7 Mfr.Part#:AD9517-0ABCPZ-RL7 Compare: AD9517-1ABCPZ VS AD9517-0ABCPZ-RL7 Manufacturers:Adi Category:Clock Generators Description:Clock generator -40℃ to 85℃ 48pin lfcsp ep t/r