74HC Series 6 V 4 -16 Line Decoder/Demultiplexer w/ Input Latches - SOIC-24
The 74HC154PW is a 4-to-16 Decoder/Demultiplexer pin compatible with low-power Schottky TTL (LSTTL). It accepts four active high binary address inputs and provide 16 mutually-exclusive active low outputs. The two-input enable gate can be used to strobe the decoder to eliminate the normal decoding "glitches" on the outputs or can be used for the expansion of the decoder. The enable gate has two ANDed inputs which must be low to enable the outputs. It can be used as a 1-to-16 demultiplexer by using one of the enable inputs as the multiplexed data input. When the other enable input is low, the addressed output will follow the state of the applied data.
The 74HC4515D is a 4-to-16 line inverting Decoder/Demultiplexer with input latches. This high-speed Si-gate CMOS device is pin compatible with 4515 of the 4000B series. It has four binary weighted address inputs (A0 to A3) with latches, a latch enable input (LE\\) and an active low enable input (E\\). The 16 inverting outputs (Q0\ to Q15\\) are mutually exclusive active low. When LE is high, the selected output is determined by the data on An. When LE goes low, the last data present at An are stored in the latches and the outputs remain stable. When E\ is low, the selected output, determined by the contents of the latch, is low. When E\ is high, all outputs are high. The E\ does not affect the state of the latch. When the 4515 series is used as a demultiplexer, E\ is the data input and A0 to A3 are the address inputs.