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FDB045AN08A0 N-Channel PowerTrench® MOSFET Datasheet PDF Download

Author: Irene
Date: 21 Jan 2022



MOSFET Maximum Ratings

Thermal Characteristics

Package Marking and Ordering Information

Electrical Characteristics

Typical Characteristics

Test Circuits and Waveforms

Thermal Resistance vs. Mounting Pad Area

FDB045AN08A0 Datasheet

FDB045AN08A0 Manufacturer

Using Warning




  • RDS(on)= 3.9 mΩ (Typ.) @ VGS= 10 V, ID = 80 A
  • QG(tot) = 92 nC (Typ.) @ VGS= 10 V
  • Low Miller Charge
  • Low QrrBody Diode
  • UIS Capability (Single Pulse and Repetitive Pulse)



  • Synchronous Rectification for ATX / Server / Telecom PSU
  • Battery Protection Circuit
  • Motor drives and Uninterruptible Power Supplies


MOSFET Maximum Ratings

TC = 25°C unless otherwise noted

Symbol Parameter FDB045AN08A0 Units
VDSS Drain to Source Voltage 75 V
VGS Gate to Source Voltage ±20 V
ID Drain Current Continuous (TC < 137℃, VGS = 10V) 90 A
Continuous (Tamb = 25℃, VGS = 10V, with RΘJA = 43℃/W) 19 A
Pulsed Figure 4 A
EAS Single Pulse Avalanche Energy (Note 1) 600 mJ
PD Power dissipation 310 W
Derate above 25℃ 2 W/℃
TJ, TSTG Operating and Storage Temperature -55 to 175


Thermal Characteristics

RΘJC Thermal Resistance Junction to Case 0.48 ℃/W
RΘJA Thermal Resistance Junction to Ambient (Note 2) 62 ℃/W
RΘJA Thermal Resistance Junction to Ambient, 1in2 copper pad area 43 ℃/W

Package Marking and Ordering Information

Device Marking Device Package Reel Size Tape Width Quantity
FDB045AN08A0 FDB045AN08A0 D2-PAK 330 mm 24 mm 800 units


Electrical Characteristics 

TC = 25°C unless otherwise noted

Symbol Parameter Test Conditions Min Typ Max Units
Off Characteristics
BVDSS Drain to Source Breakdown Voltage ID = 250μA, VGS = 0V 75 - - V
IDSS Zero Gate Voltage Drain Current VDS = 60V - - 1 μA
VGS = 0V TC = 150℃ - - 250
IGSS Gate to Source Leakage Current VGS = ±20V - - ±100 nA
On Characteristics
VGS(TH) Gate to Source Threshold Voltage VGS = VDS, ID = 250μA 2 - 4 V
rDS(ON) Drain to Source On Resistance ID = 80A, VGS = 10V - 0.0039 0.0045 Ω
ID = 37A, VGS = 6V - 0.0056 0.0084
ID = 80A, VGS = 10V, TJ = 175℃ - 0.008 0.011
Dynamic Characteristics
CISS Input Capacitance VDS = 25V, VGS = 0V, f = 1MHz - 6600 - pF
COSS Output Capacitance - 1000 - pF
CRSS Reverse Transfer Capacitance - 240 - pF
Qg(TOT) Total Gate Charge at 10V VGS = 0V to 10V VDD = 40V   92 138 nC
Qg(TH) Threshold Gate Charge VGS = 0V to 2V  - 11 17 nC
Qgs Gate to Source Gate Charge   ID =  80A  - 27 - nC
Qgs2 Gate Charge Threshold to Plateau Ig = 1.0mA - 16 - nC
Qgd Gate to Drain “Miller” Charge - 21 - nC
Switching Characteristics  (VGS = 10V)
tON Turn-On Time VDD = 40V, ID = 80A VGS = 10V, RGS = 3.3Ω - - 160 ns
td(ON) Turn-On Delay Time - 18 - ns
tr Rise Time - 88 - ns
td(OFF) Turn-Off Delay Time - 40 - ns
tf Fall Time - 45 - ns
tOFF Turn-Off Time - - 128 ns
Drain-Source Diode Characteristics
VSD Source to Drain Diode Voltage ISD = 80A - - 1.25 V
ISD = 40A - - 1 V
trr Reverse Recovery Time ISD = 75A, dISD/dt = 100A/μs - - 53 ns
QRR Reverse Recovered Charge ISD = 75A, dISD/dt = 100A/μs - - 54 nC


Typical Characteristics 

TC = 25°C unless otherwise noted

Typical Characteristics 1,2


Typical Characteristics 3


Typical Characteristics 4


Typical Characteristics 5,6


Typical Characteristics 7,8


Typical Characteristics 9,10


Typical Characteristics 11,12


Typical Characteristics 13,14


Test Circuits and Waveforms

Test Circuits and Waveforms 15,16


Test Circuits and Waveforms 17,18


Test Circuits and Waveforms 19,20


Thermal Resistance vs. Mounting Pad Area

Thermal Resistance vs. Mounting Pad Area


The maximum rated junction temperature, TJM, and the thermal resistance of the heat dissipating path determines the maximum allowable device power dissipation, PDM, in an application. Therefore the application’s ambient temperature, TA (℃), and thermal resistance RJA (℃/W) must be reviewed to ensure that TJM is never exceeded. Equation 1 mathematically represents the relationship and serves as the basis for establishing the rating of the part.

                          (EQ. 1)

In using surface mount devices such as the TO-263 package, the environment in which it is applied will have a significant influence on the part’s current and maximum power dissipation ratings. Precise determination of PDM is complex and influenced by many factors:

1.Mounting pad area onto which the device is attached and whether there is copper on one side or both sides of the board.

2.The number of copper layers and the thickness of the board.

3.The use of external heat sinks.

4.The use of thermal vias.

5.Air flow and board orientation.

6.For non steady state applications, the pulse width, the duty cycle and the transient thermal response of the part, the board and the environment they are in.


Fairchild provides thermal information to assist the designer’s preliminary application evaluation. Figure 21 defines the RΘJA for the device as a function of the top copper (component side) area. This is for a horizontally positioned FR-4 board with 1oz copper after 1000 seconds of steady state power with no air flow. This graph provides the necessary information for calculation of the steady state junction temperature or power dissipation. Pulse applications can be evaluated using the Fairchild device Spice thermal model or manually utilizing the normalized maximum transient thermal impedance curve.


Thermal resistances corresponding to other copper areas can be obtained from Figure 21 or by calculation using Equation 2 or 3. Equation 2 is used for copper area defined in inches square and equation 3 is for area in centimeters square. The area, in square inches or square centimeters is the top copper area including the gate and source pads.

            (EQ. 2)  Area in Inches Squared

                (EQ. 3)  Area in Centimeters Squared


FDB045AN08A0 Datasheet

You can download the datasheet from the link given below:

FDB045AN08A0 Datasheet


FDB045AN08A0 Manufacturer

Onsemi is driving energy efficient innovations, empowering customers to reduce global energy use. The company offers a comprehensive portfolio of energy efficient power and signal management, logic, discrete and custom solutions to help design engineers solve their unique design challenges in automotive, communications, computing, consumer, industrial, LED lighting, medical, military/aerospace and power supply applications. onsemi operates a responsive, reliable, world-class supply chain and quality program, and a network of manufacturing facilities, sales offices and design centers in key markets throughout North America, Europe, and the Asia Pacific regions.


Using Warning

Note: Please check their parameters and pin configuration before replacing them in your circuit.



What is the N-Channel MOSFET?

A N-Channel MOSFET is a type of MOSFET in which the channel of the MOSFET is composed of a majority of electrons as current carriers. When the MOSFET is activated and is on, the majority of the current flowing are electrons moving through the channel.


What is N channel and P channel?

N Channel MOSFETs turn on when a positive voltage of the appropriate threshold value is applied across the gate-to-source terminals. P Channel MOSFETs turn on by applying a given value of a negative gate-to-source voltage. The gating of MOSFETs determines their application in SMPS converters.


Why N channel MOSFET is widely used?

The mobility of electrons, which are carriers in the case of an n-channel device, is greater than that of holes, which are the carriers in the p-channel device. Thus an n-channel device is faster than a p-channel device. The N-channel transistor has lower on-resistance and gate capacitance for the same die area.


What are the advantage of N channel mosfet over P channel Mosfet?

The N-channel MOSFET has several advantages over the P-channel MOSFET. For example, the N-channel majority carriers (electrons) have a higher mobility than the P-channel majority carriers (holes). Because of this, the N-channel transistor has lower RDS(on) and gate capacitance for the same die area.


What is N in NPN transistor?

NPN transistors are a type of bipolar transistor with three layers that are used for signal amplification. A negative-positive-negative transistor is denoted by the abbreviation NPN. A p-type semiconductor is fused between two n-type semiconductor materials in this configuration.


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