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Dec 11 2019

MPC8250AZUPIBC Datasheets| Freescale Semiconductor - NXP| PDF| Price| In Stock

Product Overview

Kynix Part #:

KY32-MPC8250AZUPIBC

Manufacturer Part#:

MPC8250AZUPIBC

Product Category:

Embedded - Microprocessors

Stock:

Yes

Manufacturer:

Freescale Semiconductor - NXP

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MPC8250AZUPIBC

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Description:

IC MPU MPC82XX 300MHZ 408TBGA

Datasheet:

MPC8250AZUPIBC Datasheet

Package:

480-LBGA

Quantity:

2102 PCS


MPC8250AZUPIBC Images are for reference only:

MPC8250AZUPIBC 


CAD Models

There is no relevant information available for this part yet. 


Product Attributes

Manufacturer:

Freescale Semiconductor - NXP

Product Category:

Embedded - Microprocessors

Series:

MPC82xx

Access Time:

300 µs

Address Bus Width:

32.0

Bit Size:

32

Boundary Scan:

Yes

Core Processor:

PowerPC G2

Co-Processors/DSP:

Communications; RISC CPM

Device Core:

PowerQUICC II

Data Bus Width:

32 bit

Display & Interface Controllers:

-

Ethernet:

10/100Mbps (3)

External Data Bus Width:

64.0

Format:

FLOATING POINT

Frequency:

300 MHz

Graphics Acceleration:

No

Interface Type:

Ethernet, PCI, UART

Integrated Cache:

Yes

Instruction Set Architecture:

RISC

JESD-30 Code:

S-PBGA-B480

JESD-609 Code:

e0

Length:

37.5 mm

Lead Finish:

Tin/Lead/Silver

Low Power Mode:

No

Memory Type:

L1 Cache, RAM

Mounting-Style:

SMD/SMT

Maximum Clock Frequency:

300 MHz

Number of Pins:

480

Number of Timers:

4

Number of Terminals:

480

Number of CPU Cores:

1

Operating Temperature-Min:

0.0°C

Operating Temperature-Max:

105°C

Pin Count:

480

Power Supplies:

1.7/2.2

Package/Case:

480-LBGA Exposed Pad

Package Shape:

SQUARE

Package Code:

LBGA

Package Style:

GRID ARRAY, LOW PROFILE

Package Body Material:

PLASTIC/EPOXY

Package Equivalence Code:

BGA480,29X29,50

Peak Reflow Temperature:

220 °C

RAM Size:

32 kB

RAM Controllers:

DRAM, SDRAM

SATA:

-

Speed:

300.0 MHz

Sub Category:

Other uPs/uCs/Peripheral ICs

Surface Mount:

Yes

Security Features:

-

Seated Height-Max:

1.65 mm

Supply Voltage-Nom:

2.0 V

Supply Voltage-Min:

1.9 V

Supply Voltage-Max:

2.2 V

Supplier Device Package:

480-TBGA (37.5x37.5)

Tradename:

PowerQUICC

Technology:

CMOS

Terminal Form:

BALL

Terminal Pitch:

1.27 mm

Terminal Finish:

TIN LEAD

Terminal Position:

BOTTOM

Temperature Grade:

COMMERCIAL

Time@Peak Reflow Temperature-Max:

30 s

USB:

-

Unit Weight:

0.358491 oz

Width:

37.5 mm


Product Features

• Footprint-compatible with the MPC8260

• Dual-issue integer core

— A core version of the EC603e microprocessor

— System core microprocessor supporting frequencies of 150–200 MHz

— Separate 16-Kbyte data and instruction caches:

– Four-way set associative

– Physically addressed

– LRU replacement algorithm

— PowerPC architecture-compliant memory management unit (MMU)

— Common on-chip processor (COP) test interface

— High-performance (4.4–5.1 SPEC95 benchmark at 200 MHz; 280 Dhrystones MIPS at 200 MHz)

— Supports bus snooping for data cache coherency

— Floating-point unit (FPU)

• Separate power supply for internal logic (1.8 V) and for I/O (3.3V)

• Separate PLLs for G2 core and for the CPM

— G2 core and CPM can run at different frequencies for power/performance optimization

— Internal core/bus clock multiplier that provides 1.5:1, 2:1, 2.5:1, 3:1, 3.5:1, 4:1, 5:1, 6:1 ratios

— Internal CPM/bus clock multiplier that provides 2:1, 2.5:1, 3:1, 3.5:1, 4:1, 5:1, 6:1 ratios

• 64-bit data and 32-bit address 60x bus

— Bus supports multiple master designs

— Supports single- and four-beat burst transfers

— 64-, 32-, 16-, and 8-bit port sizes controlled by on-chip memory controller

— Supports data parity or ECC and address parity

• 32-bit data and 18-bit address local bus

— Single-master bus, supports external slaves

— Eight-beat burst transfers

— 32-, 16-, and 8-bit port sizes controlled by on-chip memory controller

• 60x-to-PCI bridge

— Programmable host bridge and agent

— 32-bit data bus, 66 MHz, 3.3 V

— Synchronous and asynchronous 60x and PCI clock modes

— All internal address space available to external PCI host

— DMA for memory block transfers

— PCI-to-60x address remapping

• System interface unit (SIU)

— Clock synthesizer

— Reset controller

— Real-time clock (RTC) register

— Periodic interrupt timer

— Hardware bus monitor and software watchdog timer

— IEEE 1149.1™ JTAG test access port

• Twelve-bank memory controller

— Glueless interface to SRAM, page mode SDRAM, DRAM, EPROM, Flash and other userdefinable peripherals

— Byte write enables and selectable parity generation

— 32-bit address decodes with programmable bank size

— Three user programmable machines, general-purpose chip-select machine, and page-mode pipeline SDRAM machine

— Byte selects for 64 bus width (60x) and byte selects for 32 bus width (local)

— Dedicated interface logic for SDRAM

• CPU core can be disabled and the device can be used in slave mode to an external core

• Communications processor module (CPM)

— Embedded 32-bit communications processor (CP) uses a RISC architecture for flexible support for communications protocols

— Interfaces to G2 core through on-chip 32-Kbyte dual-port RAM and DMA controller

— Serial DMA channels for receive and transmit on all serial channels

— Parallel I/O registers with open-drain and interrupt capability

— Virtual DMA functionality executing memory-to-memory and memory-to-I/O transfers

— Three fast communications controllers supporting the following protocols:

– 10/100-Mbit Ethernet/IEEE 802.3® CDMA/CS interface through media independent interface (MII)

– Transparent

– HDLC—Up to T3 rates (clear channel)

— One multichannel controller (MCC2)

– Handles 128 serial, full-duplex, 64-Kbps data channels. The MCC can be split into four subgroups of 32 channels each.

– Almost any combination of subgroups can be multiplexed to single or multiple TDM interfaces up to four TDM interfaces per MCC

— Four serial communications controllers (SCCs) identical to those on the MPC860, supporting the digital portions of the following protocols:

– Ethernet/IEEE 802.3 CDMA/CS

– HDLC/SDLC and HDLC bus

– Universal asynchronous receiver transmitter (UART)

– Synchronous UART

– Binary synchronous (BISYNC) communications

– Transparent

— Two serial management controllers (SMCs), identical to those of the MPC860

– Provide management for BRI devices as general circuit interface (GCI) controllers in timedivision-multiplexed (TDM) channels

– Transparent

– UART (low-speed operation)

— One serial peripheral interface identical to the MPC860 SPI

— One inter-integrated circuit (I2C) controller (identical to the MPC860 I2C controller)

– Microwire compatible

– Multiple-master, single-master, and slave modes

— Up to four TDM interfaces

– Supports one group of four TDM channels

– 2,048 bytes of SI RAM

– Bit or byte resolution

– Independent transmit and receive routing, frame synchronization

– Supports T1, CEPT, T1/E1, T3/E3, pulse code modulation highway, ISDN basic rate, ISDN primary rate, Freescale interchip digital link (IDL), general circuit interface (GCI), and user-defined TDM serial interfaces

— Eight independent baud rate generators and 20 input clock pins for supplying clocks to FCCs, SCCs, SMCs, and serial channels

— Four independent 16-bit timers that can be interconnected as two 32-bit timers

• PCI bridge

— PCI Specification Revision 2.2 compliant and supports frequencies up to 66 MHz

— On-chip arbitration

— Support for PCI to 60x memory and 60x memory to PCI streaming

 — Includes 4 DMA channels for the following transfers:

– PCI-to-60x to 60x-to-PCI

– 60x-to-PCI to PCI-to-60x

– PCI-to-60x to PCI-to-60x

– 60x-to-PCI to 60x-to-PCI

— Includes all of the configuration registers (which are automatically loaded from the EPROM and used to configure the MPC8265A) required by the PCI standard as well as message and doorbell registers

— Supports the I2O standard

— Hot-Swap friendly (supports the Hot Swap Specification as defined by PICMG 2.1 R1.0 August 3, 1998)

— Support for 66 MHz, 3.3 V specification

— 60x-PCI bus core logic which uses a buffer pool to allocate buffers for each port

— Makes use of the local bus signals, so there is no need for additional pins


Applications

There is no relevant information available for this part yet.


Advantages and Disadvantages

There is no relevant information available for this part yet.


ECCN / UNSPSC

ECCN

3A991.A.2

HTSN:

8542310001

SCHEDULE B:

8542390000


Environmental & Export Classifications

Moisture Sensitivity Level (MSL)

3(168 Hours)

Lead Free Status / RoHS Status

Lead free / RoHS Compliant


Product Compliance

USHTS:

8542310001

CAHTS:

8542310012

CNHTS:

8542319000

JPHTS:

8542310313

KRHTS:

8542311000

MXHTS:

85423199

TARIC:

8542319000

Halogen Free:

Not Halogen Free

Radiation Hardening:

No


Documents & Media

Datasheets

MPC8250AZUPIBC Datasheet

Images

Functional Block Diagram - Large

Test/Quality Data

Material Composition

Statement on EU REACH Provisions


Product Manufacturer

NXP Semiconductor enables secure connections and infrastructure for a smarter world, advancing solutions that make lives easier, better and safer. As the world leader in secure connectivity solutions for embedded applications, NXP is driving innovation in the secure connected vehicle, end-to-end security & privacy and smart connected solutions markets. Built on more than 60 years of combined experience and expertise, the company has 45,000 employees in more than 35 countries.


Product Range

ARM ® PROCESSORS

ANALOG

POWER ARCHITECTURE ®PROCESSORS

MEDIA AND AUDIO

RF

IDENTIFICATION & SECURITY

Sensors

Wireless

Automotive Products


Distributors

Distributors

Stock

Manufacturers

Descriptions

Kynix

2102

Freescale Semiconductor - NXP

IC MPU MPC82XX 300MHZ 408TBGA

DigiKey

0

NXP USA Inc.

IC MPU MPC82XX 300MHZ 480TBGA

Mouser

0

NXP Semiconductors

Microprocessors - MPU POWER QUICC II HIP4C


Alternative Models

There is no relevant information available for this part yet.


Popularity by Region

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Market Price Analysis

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