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XC6SLX100-2FGG676I Datasheets| XILINX| PDF| Price| In Stock

Author: Apogeeweb
Date: 1 Jul 2019
 2044
IC Chips

Product Overview

Kynix Part #:

KY32-XC6SLX100-2FGG676I

Manufacturer Part#:

XC6SLX100-2FGG676I

Product Category:

IC Chips

Stock:

Yes

Manufacturer:

XILINX

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XC6SLX100-2FGG676I

purchase

Description:

-

Datasheet:

XC6SLX100-2FGG676I Datasheet

Package:

BGA676

Quantity:

256 PCS


XC6SLX100-2FGG676I Images are for reference only:

XC6SLX100-2FGG676I


CAD Models

XC6SLX100-2FGG676I Symbol

XC6SLX100-2FGG676I Symbol

XC6SLX100-2FGG676I Footprint

XC6SLX100-2FGG676I Footprint


Product Attributes

Manufacturer:

XILINX

Product Category:

IC Chips

Status:

Active

Series:

Spartan®-6 LX

Clock Frequency-Max:

667.0 MHz

Combinatorial Delay of a CLB-Max:

0.26 ns

Device Logic Cells:

101261

Device Logic Units:

101261

EU RoHS Compliant:

Yes

In System Programmability:

No

.JESD-30 Code:

S-PBGA-B676

JESD-609 Code:

e1

Length:

27.0 mm

Lead Finish:

Tin/Silver/Copper

Mounting Type:

Surface Mount

Number of I/O:

480

Number of CLBs:

7911.0

Number of Pins:

676

Number of Inputs:

480.0

Number of Outputs:

480.0

Number of Terminals:

676

Number of Registers:

126,576

Number of Logic Cells:

101261.0

Organization:

7911 CLBS

Operating Temperature-Min:

-40.0 °C

Operating Temperature-Max:

100.0 °C

Pin Count:

676

Power Supplies:

1.2,2.5/3.3

Package / Case:

676-BGA

Package Code:

BGA

Package Style:

GRID ARRAY

Package Shape:

SQUARE

Package Body Material:

PLASTIC/EPOXY

Package Equivalence Code:

BGA676,26X26,40

Peak Reflow Temperature:

250 °C

Programmable Logic Type:

FIELD PROGRAMMABLE GATE ARRAY

RAM Size:

4,939,776 Bit

Re-programmability Support:

1

REACH Compliant:

Yes

Sub Category:

Field Programmable Gate Arrays

Speed Grade:

2

Surface Mount:

Yes

Screening Level:

Industrial

Seated Height-Max:

2.44 mm

Supply Voltage-Nom:

1.2 V

Supply Voltage-Min:

1.14 V

Supply Voltage-Max:

1.26 V

Supplier Device Package:

676-FBGA (27x27)

Technology:

CMOS

Total RAM Bits:

4939776

Terminal Form:

BALL

Terminal Pitch:

1.0 mm

Terminal Position:

BOTTOM

Temperature Grade:

INDUSTRIAL

Time@Peak Reflow Temperature-Max:

30 s

Voltage - Supply:

1.14 V ~ 1.26 V

Width:

27.0 mm


Product Features

• Spartan-6 Family:

 Spartan-6 LX FPGA: Logic optimized

 Spartan-6 LXT FPGA: High-speed serial connectivity

• Designed for low cost

 Multiple efficient integrated blocks

 Optimized selection of I/O standards

 Staggered pads

 High-volume plastic wire-bonded packages

• Low static and dynamic power

 45 nm process optimized for cost and low power

 Hibernate power-down mode for zero power

 Suspend mode maintains state and configuration with multi-pin wake-up, control enhancement

 Lower-power 1.0V core voltage (LX FPGAs, -1L only)

 High performance 1.2V core voltage (LX and LXT FPGAs, -2, -3, and -3N speed grades)

• Multi-voltage, multi-standard SelectIO™ interface banks

 Up to 1,080 Mb/s data transfer rate per differential I/O

 Selectable output drive, up to 24 mA per pin

 3.3V to 1.2V I/O standards and protocols

 Low-cost HSTL and SSTL memory interfaces

 Hot swap compliance

 Adjustable I/O slew rates to improve signal integrity

• High-speed GTP serial transceivers in the LXT FPGAs

 Up to 3.2 Gb/s

 High-speed interfaces including: Serial ATA, Aurora, 1G Ethernet, PCI Express, OBSAI, CPRI, EPON, GPON, DisplayPort, and XAUI

• Integrated Endpoint block for PCI Express designs (LXT)

• Low-cost PCI® technology support compatible with the 33 MHz, 32- and 64-bit specification.

• Efficient DSP48A1 slices

 High-performance arithmetic and signal processing

 Fast 18 x 18 multiplier and 48-bit accumulator

 Pipelining and cascading capability

 Pre-adder to assist filter applications

• Integrated Memory Controller blocks

 DDR, DDR2, DDR3, and LPDDR support

 Data rates up to 800 Mb/s (12.8 Gb/s peak bandwidth)

 Multi-port bus structure with independent FIFO to reduce design timing issues

• Abundant logic resources with increased logic capacity

 Optional shift register or distributed RAM support

 Efficient 6-input LUTs improve performance and minimize power

 LUT with dual flip-flops for pipeline centric applications

• Block RAM with a wide range of granularity

 Fast block RAM with byte write enable

 18 Kb blocks that can be optionally programmed as two independent 9 Kb block RAMs

• Clock Management Tile (CMT) for enhanced performance

 Low noise, flexible clocking

 Digital Clock Managers (DCMs) eliminate clock skew and duty cycle distortion

 Phase-Locked Loops (PLLs) for low-jitter clocking

 Frequency synthesis with simultaneous multiplication, division, and phase shifting

 Sixteen low-skew global clock networks

• Simplified configuration, supports low-cost standards

 2-pin auto-detect configuration

 Broad third-party SPI (up to x4) and NOR flash support

 Feature rich Xilinx Platform Flash with JTAG

 MultiBoot support for remote upgrade with multiple bitstreams, using watchdog protection

• Enhanced security for design protection

 Unique Device DNA identifier for design authentication

 AES bitstream encryption in the larger devices

 Faster embedded processing with enhanced, low cost, MicroBlaze™ soft processor

• Industry-leading IP and reference designs


Product Functions

There is no relevant information available for this part yet.


Applications

There is no relevant information available for this part yet.


Advantages and Disadvantages

There is no relevant information available for this part yet.


ECCN / UNSPSC

ECCN:

3A991.D

HTSN:

8542390001

SCHEDULE B:

8542390000


Environmental & Export Classifications

Moisture Sensitivity Level (MSL)

3 (168 Hours)

Lead Free Status / RoHS Status

Lead free / RoHS Compliant


Product Compliance

RoHS

Compliant


Documents & Media

Datasheet

Spartan-6 Family Overview

Spartan-6 FPGA Datasheet

PCN Design/Specification

FG(G) and BG(G) Wire Bond 25/Jan/2013


Product Manufacturer

Xilinx, Inc. is an American technology company and is primarily a supplier of programable logic devices. It is known for inventing the field-programming gate array and as the semicondcutot company that created the first fabless manufacturing model. Ross Freeman, Bernard Vonderschmitt, and James V Barnett II, former employees of Zilog, an integrated circuit and solid-state device manufacturer, co-founded Xilinx in 1984 with headquarters in San Jose, USA.


Product Range

Devices

Boards

Developer Tools

ACAPs

Accelerator Cards

Vivado Design Suite - HLx Editions

FPGAs & 3D ICs

Evaluation Boards

SDAccel Development Environment

SoCs, MPSoCs & RFSoCs

System-on-Modules (SoMs)

SDSoC Development Environment


Distributors

Distributors

Stock

Manufacturers

Descriptions

Kynix

256

XILINX

-

DigiKey

0

Xilinx Inc.

IC FPGA 480 I/O 676FBGA

Mouser

-

-

-


Alternative Models

There is no relevant information available for this part yet.


Popularity by Region

XC6SLX100-2FGG676I Popularity by Region


Market Price Analysis

There is no relevant information available for this part yet.


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