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May 30 2019

EP3SE260H780C4N Datasheets| Altera| PDF| Price| In Stock

Product Overview

Kynix Part #:

KY32-EP3SE260H780C4N

Manufacturer Part#:

EP3SE260H780C4N

Product Category:

Embedded - FPGAs (Field Programmable Gate Array)

Stock:

Yes

Manufacturer:

Altera

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Description:

IC FPGA 488 I/O 780HBGA

Datasheet:

EP3SE260H780C4NDatasheet

Package:

780-BBGA, FCBGA

Quantity:

500 PCS


EP3SE260H780C4N Images are for reference only.

EP3SE260H780C4N


CAD Models

EP3SE260H780C4N  Footprint

EP3SE260H780C4N  Footprint


Product Attributes

Manufacturer:

Altera

Product Category:

Embedded - FPGAs (Field Programmable Gate Array)

Part Status:

Active

Series:

StratixR III E

Product:

Stratix III Enhanced

REACH Compliant:

Yes

EU RoHS Compliant:

Yes

Device Logic Cells:

255000

Differential I/O Standards Supported:

LVPECL|LVDS

Single-Ended I/O Standards Supported:

LVTTL|LVCMOS

Device Number of DLLs/PLLs:

12

External Memory Interface:

DDR2 SDRAM|DDR3 SDRAM|RLDRAM II|QDRII+SRAM

Embedded-Block-RAM-EBR:

1594 kbit

JESD-30 Code:

S-PBGA-B780

JESD-609 Code:

e1

Lead Finish(Plating):

SnAgCu

Lead Shape:

Ball

Mounting Type:

Surface Mount

Mounting Style:

SMD/SMT

Maximum Operating Temperature:

85 °C

Minimum Operating Temperature:

0 °C

Maximum Operating Supply Voltage:

1.15

Minimum Operating Supply Voltage:

0.86 V

Maximum Number of User I/Os:

488

Maximum Reflow Temperature:

245 °C

Reflow Solder Time (Sec):

30

Number of Reflow Cycle:

3

Number of I/Os:

488

Number of I/O Banks:

24

Number of Inputs:

488

Number of Outputs:

488

Number of Logic Blocks (LABs):

10200

Number of Logic Elements/Cells:

255000

Number of Multipliers:

768 (18x18)

Number of Global Clocks:

16

Package-Case:

780-BBGA, FCBGA

Packaging:

Tray

Mfr Package Description:

LEAD FREE, HBGA-780

Package Body Material:

PLASTIC/EPOXY

Package Code:

BGA

Package Equivalence Code:

BGA780,28X28,40

Package Shape:

SQUARE

Package Style:

GRID ARRAY

Package Length:

33 mm

Package Width:

33 mm

Package Height:

2.55 mm

Seated Plane Height:

3.05 mm

Pin Pitch:

1 mm

Pin Count:

780

PCB:

780

Process Technology:

65 nm

Program Memory Type:

SRAM

Shift Registers:

Utilize Memory

Speed Grade:

4

Sub Category:

Field Programmable Gate Arrays

Supplier-Device-Package:

780-HBGA (33x33)

Supplier Cage Code:

4BA62

Supported IP Core Manufacture:

Altera/CAST, Inc/Mobiveil, Inc/Eureka Technology Inc/Barco Silex

Technology:

CMOS

Terminal Finish:

Tin/Silver/Copper (Sn/Ag/Cu)

Terminal Form:

BALL

Terminal Position:

BOTTOM

Total Memory:

16282 kbit

Total-RAM-Bits:

16672768

Total Number of Block RAM:

48+864+5100

Additional Feature:

IT CAN ALSO OPERATE FROM 1.05 TO 1.15V SUPPLY


Descriptions

The Stratix® III family provides one of the most architecturally advanced, high-performance, low-power FPGAs in the marketplace.

Stratix III FPGAs lower power consumption through Altera’s innovative Programmable Power Technology, which provides the ability to turn on the performance where needed and turn down the power consumption for blocks not in use. Selectable Core Voltage and the latest in silicon process optimizations are also employed to deliver the industry’s lowest power, high-performance FPGAs.

Specifically designed for ease of use and rapid system integration, the Stratix III FPGA family offers two variants optimized to meet different application needs:

 The Stratix III L family provides balanced logic, memory, and multiplier ratios for mainstream applications.

 The Stratix III E family is memory- and multiplier-rich for data-centric applications.

Modular I/O banks with a common bank structure for vertical migration lend efficiency and flexibility to the high-speed I/O. Package and die enhancements with dynamic on-chip termination, output delay, and current strength control provide best-in-class signal integrity.

Based on a 1.1-V, 65-nm all-layer copper SRAM process, the Stratix III family is a programmable alternative to custom ASICs and programmable processors for high-performance logic, digital signal processing (DSP), and embedded designs.

Stratix III devices include optional configuration bit stream security through volatile or non-volatile 256-bit Advanced Encryption Standard (AES) encryption. Where ultra-high reliability is required, Stratix III devices include automatic error detection circuitry to detect data corruption by soft errors in the configuration random-access memory (CRAM) and user memory cells.


Product Features

48,000 to 338,000 equivalent logic elements (LEs) (refer to Table 1–1)

2,430 to 20,497 Kbits of enhanced TriMatrix memory consisting of three RAM block sizes to implement true dual-port memory and FIFO buffers

High-speed DSP blocks provide dedicated implementation of 9×9, 12×12, 18×18, and 36×36 multipliers (at up to 550 MHz), multiply-accumulate functions, and finite impulse response (FIR) filters

I/O:GND:PWR ratio of 8:1:1 along with on-die and on-package decoupling for robust signal integrity

Programmable Power Technology, which minimizes power while maximizing device performance

Selectable Core Voltage, available in low-voltage devices (L ordering code suffix), enables selection of lowest power or highest performance operation

Up to 16 global clocks, 88 regional clocks, and 116 peripheral clocks per device

Up to 12 phase-locked loops (PLLs) per device that support PLL reconfiguration, clock switchover, programmable bandwidth, clock synthesis, and dynamic phase shifting

Memory interface support with dedicated DQS logic on all I/O banks

Support for high-speed external memory interfaces including DDR, DDR2, DDR3 SDRAM, RLDRAM II, QDR II, and QDR II+ SRAM on up to 24 modular I/O banks

Up to 1,104 user I/O pins arranged in 24 modular I/O banks that support a wide range of industry I/O standards

Dynamic On-Chip Termination (OCT) with auto calibration support on all I/O banks

High-speed differential I/O support with serializer/deserializer (SERDES) and dynamic phase alignment (DPA) circuitry for 1.6 Gbps performance

Support for high-speed networking and communications bus standards including SPI-4.2, SFI-4, SGMII, Utopia IV, 10 Gigabit Ethernet XSBI, Rapid I/O, and NPSI

The only high-density, high-performance FPGA with support for 256-bit AES volatile and non-volatile security key to protect designs

Robust on-chip hot socketing and power sequencing support

Integrated cyclical redundancy check (CRC) for configuration memory error detection with critical error determination for high availability systems support

Built-in error correction coding (ECC) circuitry to detect and correct data errors in M144K TriMatrix memory blocks

Nios® II embedded processor support

Support for multiple intellectual property megafunctions from Altera® MegaCore® functions and Altera Megafunction Partners Program (AMPPSM)


Product Functions

There is no relevant information available for this part yet.


Application

There is no relevant information available for this part yet.


Advantages and Disadvantages

There is no relevant information available for this part yet.


ECCN / UNSPSC

Description

Value

ECCN:

3A001.a.7.a

CAHTS:

8542390029

CNHTS:

8542319000

MXHTS:

85423901

USHTS:

8542390001

JPHTS:

8542390990

TARIC:

8542399000


Environmental & Export Classifications

Moisture Sensitivity Level (MSL)

3(168 Hours)

Lead Free Status / RoHS Status

Lead free / RoHS Compliant


Product Compliance

There is no relevant information available for this part yet.


Documents & Media

Datasheets

Stratix III Device Handbook Vol 1

Stratix III Device Family Overview

Stratix III Device Datasheet

Stratix III Device Handbook Vol 2

Stratix III Device Handbook

Virtual JTAG Megafuntion User Guide


Product Manufacturer

Altera Corporation is an American manufacturer of programmable logic devices (PLDs), reconfigurable complex digital circuits.[1] Altera released its first PLD in 1984. Altera's main products are the Stratix, Arria and Cyclone series FPGAs, the MAX series CPLDs, Quartus II design software, and Enpirion PowerSoC DC-DC power solutions.

Altera and Intel announced on June 1, 2015 that they have agreed that Intel would acquire Altera in an all-cash transaction valued at approximately $16.7 billion. As of December 28, 2015, the acquisition had been completed.


Product Range

FPGAs

SoC FPGAs

PowerSoC

ASICs

IP cores

Design software


Distributors

Distributor

Stock

Manufacturer

Descriptions

Kynix

500

Altera

IC FPGA 488 I/O 780HBGA

Digikey

0

Intel

IC FPGA 488 I/O 780HBGA

Mouser

0

Intel / Altera

FPGA - Field Programmable Gate Array FPGA - Stratix III 10200 LABs 488 IOs


Alternative Models

There is no relevant information available for this part yet.


Popularity by Region

There is no relevant information available for this part yet.


Market Price Analysis

There is no relevant information available for this part yet.


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