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Dec 31 2019

LM3S811-IQN50-C2 Datasheets| Texas Instruments| PDF| Price| In Stock

Product Overview

Kynix Part #:

KY32-LM3S811-IQN50-C2

Manufacturer Part#:

LM3S811-IQN50-C2

Product Category:

Embedded - Microcontrollers

Stock:

Yes

Manufacturer:

Texas Instruments

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Description:

IC MCU 32BIT 64KB FLASH 48LQFP

Datasheet:

LM3S811-IQN50-C2 Datasheet

Package:

48-LQFP

Quantity:

642 PCS


LM3S811-IQN50-C2 Images are for reference only.

LM3S811-IQN50-C2 Image 


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 LM3S811-IQN50-C2 Symbol

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 LM3S811-IQN50-C2 Footprint

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Product Attributes

Categories

Integrated Circuits (ICs) Embedded - Microcontrollers

Manufacturer

Texas Instruments

Series

Stellaris® ARM® Cortex®-M3S 800

Packaging

Tray

Part Status

Not For New Designs

Core Processor

ARM® Cortex®-M3

Core Size

32-Bit

Speed

50MHz

Connectivity

I²C, Microwire, SPI, SSI, UART/USART

Peripherals

Brown-out Detect/Reset, POR, PWM, WDT

Number of I/O

32

Program Memory Size

64KB (64K x 8)

Program Memory Type

FLASH

EEPROM Size

-

RAM Size

8K x 8

Voltage - Supply (Vcc/Vdd)

3V ~ 3.6V

Data Converters

A/D 4x10b

Oscillator Type

Internal

Operating Temperature

-40°C ~ 85°C (TA)

Mounting Type

Surface Mount

Package / Case

48-LQFP

Supplier Device Package

48-LQFP (7x7)

Base Part Number

LM3S811

Mfr Package Description

LQFP-48

REACH Compliant

Yes

EU RoHS Compliant

Yes

China RoHS Compliant

Yes

Status

NRFND

ADC Channels

YES

Address Bus Width

0.0

Bit Size

32

Boundary Scan

YES

Clock Frequency-Max

0.032  MHz

CPU Family

CORTEX-M3

DAC Channels

NO

DMA Channels

NO

External Data Bus Width

0.0

Format

FIXED-POINT

Integrated Cache

YES

JESD-30 Code

S-PQFP-G48

JESD-609 Code

e3

Low Power Mode

YES

Moisture Sensitivity Level

3

Number of DMA Channels

0.0

Number of External Interrupts

0.0

Number of I/O Lines

32.0

Number of Serial I/Os

4.0

Number of Terminals

48

Number of Timers

3.0

On Chip Data RAM Width

8

On Chip Program ROM Width

8.0

Operating Temperature-Min

-40.0  Cel

Operating Temperature-Max

85.0  Cel

Package Body Material

PLASTIC/EPOXY

Package Code

LFQFP

Package Equivalence Code

QFP48,.35SQ,20

Package Shape

SQUARE

Package Style

FLATPACK

Peak Reflow Temperature (Cel)

260

Power Supplies

3.3

PWM Channels

YES

Qualification Status

Not Qualified

RAM (bytes)

8192.0

ROM Programmability

FLASH

ROM (words)

65536

Seated Height-Max

1.6  mm

Speed

50.0  MHz

Sub Category

Microcontrollers

Supply Current-Max

110.0  mA

Supply Voltage-Nom

3.3  V

Supply Voltage-Min

3.0  V

Supply Voltage-Max

3.6  V

Surface Mount

YES

Technology

CMOS

Temperature Grade

INDUSTRIAL

Terminal Finish

Tin (Sn)

Terminal Form

GULL WING

Terminal Pitch

0.5  mm

Terminal Position

QUAD

Time@Peak Reflow Temperature-Max (s)

NOT SPECIFIED

Length

7.0  mm

Width

7.0  mm


Features

The LM3S811 microcontroller includes the following product features:

■ 32-Bit RISC Performance

– 32-bit ARM® Cortex™-M3 v7M architecture optimized for small-footprint embedded applications

– System timer (SysTick), providing a simple, 24-bit clear-on-write, decrementing, wrap-on-zero counter with a flexible control mechanism

– Thumb®-compatible Thumb-2-only instruction set processor core for high code density

– 50-MHz operation

– Hardware-division and single-cycle-multiplication

– Integrated Nested Vectored Interrupt Controller (NVIC) providing deterministic interrupt handling

– 26 interrupts with eight priority levels

– Memory protection unit (MPU), providing a privileged mode for protected operating system functionality

– Unaligned data access, enabling data to be efficiently packed into memory

– Atomic bit manipulation (bit-banding), delivering maximum memory utilization and streamlined peripheral control

■ ARM® Cortex™-M3 Processor Core

– Compact core.

– Thumb-2 instruction set, delivering the high-performance expected of an ARM core in the memory size usually associated with 8- and 16-bit devices; typically in the range of a few kilobytes of memory for microcontroller class applications.

– Rapid application execution through Harvard architecture characterized by separate buses for instruction and data.

– Exceptional interrupt handling, by implementing the register manipulations required for handling an interrupt in hardware.

– Deterministic, fast interrupt processing: always 12 cycles, or just 6 cycles with tail-chaining

– Memory protection unit (MPU) to provide a privileged mode of operation for complex applications.

– Migration from the ARM7™ processor family for better performance and power efficiency.

– Full-featured debug solution

• Serial Wire JTAG Debug Port (SWJ-DP)

• Flash Patch and Breakpoint (FPB) unit for implementing breakpoints

• Data Watchpoint and Trigger (DWT) unit for implementing watchpoints, trigger resources, and system profiling

• Instrumentation Trace Macrocell (ITM) for support of printf style debugging

• Trace Port Interface Unit (TPIU) for bridging to a Trace Port Analyzer

– Optimized for single-cycle flash usage

– Three sleep modes with clock gating for low power

– Single-cycle multiply instruction and hardware divide

– Atomic operations

– ARM Thumb2 mixed 16-/32-bit instruction set

– 1.25 DMIPS/MHz

■ JTAG

– IEEE 1149.1-1990 compatible Test Access Port (TAP) controller

– Four-bit Instruction Register (IR) chain for storing JTAG instructions

– IEEE standard instructions: BYPASS, IDCODE, SAMPLE/PRELOAD, EXTEST and INTEST

– ARM additional instructions: APACC, DPACC and ABORT

– Integrated ARM Serial Wire Debug (SWD)

■ Internal Memory

– 64 KB single-cycle flash

• User-managed flash block protection on a 2-KB block basis

• User-managed flash data programming

• User-defined and managed flash-protection block

– 8 KB single-cycle SRAM

■ GPIOs

– 1-32 GPIOs, depending on configuration

– 5-V-tolerant in input configuration

– Fast toggle capable of a change every two clock cycles

– Programmable control for GPIO interrupts

• Interrupt generation masking

• Edge-triggered on rising, falling, or both

• Level-sensitive on High or Low values

– Bit masking in both read and write operations through address lines

– Can initiate an ADC sample sequence

– Pins configured as digital inputs are Schmitt-triggered.

– Programmable control for GPIO pad configuration

• Weak pull-up or pull-down resistors

• 2-mA, 4-mA, and 8-mA pad drive for digital communication

• Slew rate control for the 8-mA drive

• Open drain enables

• Digital input enables

■ General-Purpose Timers

– Three General-Purpose Timer Modules (GPTM), each of which provides two 16-bit timers/counters. Each GPTM can be configured to operate independently:

• As a single 32-bit timer

• As one 32-bit Real-Time Clock (RTC) to event capture

• For Pulse Width Modulation (PWM)

• To trigger analog-to-digital conversions

– 32-bit Timer modes

• Programmable one-shot timer

• Programmable periodic timer

• Real-Time Clock when using an external 32.768-KHz clock as the input

• User-enabled stalling when the controller asserts CPU Halt flag during debug

• ADC event trigger

– 16-bit Timer modes

• General-purpose timer function with an 8-bit prescaler (for one-shot and periodic modes only)

• Programmable one-shot timer

• Programmable periodic timer

• User-enabled stalling when the controller asserts CPU Halt flag during debug

• ADC event trigger

– 16-bit Input Capture modes

• Input edge count capture

• Input edge time capture

– 16-bit PWM mode

• Simple PWM mode with software-programmable output inversion of the PWM signal

■ ARM FiRM-compliant Watchdog Timer

– 32-bit down counter with a programmable load register

– Separate watchdog clock with an enable

– Programmable interrupt generation logic with interrupt masking

– Lock register protection from runaway software

– Reset generation logic with an enable/disable

– User-enabled stalling when the controller asserts the CPU Halt flag during debug

■ ADC

– Four analog input channels

– Single-ended and differential-input configurations

– On-chip internal temperature sensor

– Sample rate of 500 thousand samples/second

– Flexible, configurable analog-to-digital conversion

– Four programmable sample conversion sequences from one to eight entries long, with corresponding conversion result FIFOs

– Flexible trigger control

• Controller (software)

• Timers

• Analog Comparators

• PWM

• GPIO

– Hardware averaging of up to 64 samples for improved accuracy

– Converter uses an internal 3-V reference

■ UART

– Two fully programmable 16C550-type UARTs

– Separate 16x8 transmit (TX) and receive (RX) FIFOs to reduce CPU interrupt service loading

– Programmable baud-rate generator allowing speeds up to 3.125 Mbps

– Programmable FIFO length, including 1-byte deep operation providing conventional double-buffered interface

– FIFO trigger levels of 1/8, 1/4, 1/2, 3/4, and 7/8

– Standard asynchronous communication bits for start, stop, and parity

– Line-break generation and detection

– Fully programmable serial interface characteristics

• 5, 6, 7, or 8 data bits

• Even, odd, stick, or no-parity bit generation/detection

• 1 or 2 stop bit generation

■ Synchronous Serial Interface (SSI)

– Master or slave operation

– Programmable clock bit rate and prescale

– Separate transmit and receive FIFOs, 16 bits wide, 8 locations deep

– Programmable interface operation for Freescale SPI, MICROWIRE, or Texas Instruments synchronous serial interfaces

– Programmable data frame size from 4 to 16 bits

– Internal loopback test mode for diagnostic/debug testing

■ I2C

– Devices on the I2C bus can be designated as either a master or a slave

• Supports both sending and receiving data as either a master or a slave

• Supports simultaneous master and slave operation

– Four I2C modes

• Master transmit

• Master receive

• Slave transmit

• Slave receive

– Two transmission speeds: Standard (100 Kbps) and Fast (400 Kbps)

– Master and slave interrupt generation

• Master generates interrupts when a transmit or receive operation completes (or aborts due to an error)

• Slave generates interrupts when data has been sent or requested by a master

– Master with arbitration and clock synchronization, multimaster support, and 7-bit addressing mode

■ Analog Comparators

– One integrated analog comparator

– Configurable for output to drive an output pin, generate an interrupt, or initiate an ADC sample sequence

– Compare external pin input to external pin input or to internal programmable voltage reference

– Compare a test voltage against any one of these voltages

• An individual external reference voltage

• A shared single external reference voltage

• A shared internal reference voltage

■ PWM

– Three PWM generator blocks, each with one 16-bit counter, two PWM comparators, a PWM signal generator, a dead-band generator, and an interrupt/ADC-trigger selector

– One fault input in hardware to promote low-latency shutdown

– One 16-bit counter

• Runs in Down or Up/Down mode

• Output frequency controlled by a 16-bit load value

• Load value updates can be synchronized

• Produces output signals at zero and load value

– Two PWM comparators

• Comparator value updates can be synchronized

• Produces output signals on match

– PWM generator

• Output PWM signal is constructed based on actions taken as a result of the counter and PWM comparator output signals

• Produces two independent PWM signals

– Dead-band generator

• Produces two PWM signals with programmable dead-band delays suitable for driving a half-H bridge

• Can be bypassed, leaving input PWM signals unmodified

– Flexible output control block with PWM output enable of each PWM signal

• PWM output enable of each PWM signal

• Optional output inversion of each PWM signal (polarity control)

• Optional fault handling for each PWM signal

• Synchronization of timers in the PWM generator blocks

• Interrupt status summary of the PWM generator blocks

– Can initiate an ADC sample sequence

■ Power

– On-chip Low Drop-Out (LDO) voltage regulator, with programmable output user-adjustable from 2.25 V to 2.75 V

– Low-power options on controller: Sleep and Deep-sleep modes

– Low-power options for peripherals: software controls shutdown of individual peripherals

– User-enabled LDO unregulated voltage detection and automatic reset

– 3.3-V supply brown-out detection and reporting via interrupt or reset

■ Flexible Reset Sources

– Power-on reset (POR)

– Reset pin assertion

– Brown-out (BOR) detector alerts to system power drops

– Software reset

– Watchdog timer reset

– Internal low drop-out (LDO) regulator output goes unregulated

■ Industrial temperature 48-pin RoHS-compliant LQFP package

■ Industrial temperature 48-pin RoHS-compliant QFN package


Advantages and Disadvantages

There is no relevant information available for this part yet.


Applications

■ Factory automation and control

■ Industrial control power devices

■ Building and home automation

■ Stepper motors

■ Brushless DC motors

■ AC induction motors


Product Functions

There is no relevant information available for this part yet.


ECCN / UNSPSC

Description

Value

ECCN

3A991.A.2

HTSN

8542310001

SCHEDULE B

8542310000


Environmental & Export Classifications

Moisture Sensitivity Level (MSL)

3 (168 Hours)

Lead Free Status / RoHS Status

Lead free / ROHS3 Compliant


Documents & Media

Datasheets

LM3S811
LM3S811

Product Training Modules

Intro to Timers and Clocks
Microcontrollers: SYS/BIOS: Introduction to Real-Time Operating Systems and SYS/BIOS

Design Resources

Development Tool Selector

Manufacturer Product Page

LM3S811-IQN50-C2 Specifications

EDA / CAD Models 

Download from Ultra Librarian

Online Catalog

Stellaris® 800 Series


Product Manufacturer

Texas Instruments Inc. (TI) is an American technology company that designs and manufactures semiconductors and various integrated circuits, which it sells to electronics designers and manufacturers globally. Its headquarters are in Dallas, Texas, United States. TI is one of the top ten semiconductor companies worldwide, based on sales volume. Texas Instruments's focus is on developing analog chips and embedded processors, which accounts for more than 80% of their revenue. TI also produces TI digital light processing (DLP) technology and education technology products including calculators, microcontrollers and multi-core processors. To date, TI has more than 43,000 patents worldwide.


Product Range

Devices

Boards

Developer Tools

ARM ® PROCESSORS

AUTOMOTIVE PRODUCTS

IDENTIFICATION & SECURITY

Kinetis Cortex®-M Microcontrollers

In-Vehicle Network

NFC

LPC Cortex-M Microcontrollers

Microcontrollers and Processors

RFID


Distributors

Distributor

Stock

Manufacturer

Descriptions

Kynix Semiconductor

642 PCS

Texas Instruments

IC MCU 32BIT 64KB FLASH 48LQFP

Digi-Key

2754 PCS

Texas Instruments

IC MCU 32BIT 64KB FLASH 48LQFP

Avnet

Non-stock

Texas Instruments

MCU 32-bit Stellaris ARM Cortex M3 RISC 64KB Flash 3.3V 48-Pin LQFP Tray

Mouser

59 PCS

Texas Instruments

ARM Microcontrollers - MCU ARM CORTEX-M3(IND) MICROCONTROLLER


Alternative Models

There is no relevant information available for this part yet.


Popularity by Region

LM3S811-IQN50-C2 Popularity by Region 

LM3S811-IQN50-C2 Popularity by Region


Market Price Analysis

There is no relevant information available for this part yet.


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