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Dec 28 2018

The Working Principle and Classification of Semiconductor Memory

Warm hints: This article contains about 7000 words and reading time is about 35 mins.

Introduction

Memory is a memory device in a computer system that stores programs and data. All information on the computer, including raw raw data entered, computer programs, intermediate run results, and final run results are stored in memory. It stores and retrieves information based on the location specified by the controller. Memory Configuration The memory medium constituting the memory is mainly a semiconductor device and a magnetic material. The smallest unit of storage in memory is a bistable semiconductor circuit or a CMOS transistor or magnetic material storage element that stores a binary code. A storage unit is composed of a plurality of storage units, and then a storage unit is composed of a plurality of storage units. A memory contains a number of memory locations, each of which can hold one byte. Each memory location has a number, the address, which is usually expressed in hexadecimal. The sum of data that all memory cells in a memory can hold is called its storage capacity.

Article Core

Memory

Purpose

Introduce something about memory

Application

Phone, computer and so on.

Keywords

Memory

Catalog

Introduction


Definition of Memory


Composition of Memory


 

Classification of Memory

Classification by Read-write Function of Memory

Classification by Preservability of Information

Memory Applications in Mobile Phones


Memory Characteristics


Memory Applications


Memory Principle


 


Definition of Memory

A memory is a memory device in a computer system that holds programs and data. All information on the computer, including raw raw data entered, computer programs, intermediate run results, and final run results are stored in memory. It stores and retrieves information based on the location specified by the controller.

First clear a concept: MCP stack multi-chip package, Multiple Chip Packet, is a packaging technology, this technology is used in memory. The storage medium constituting the memory is mainly a semiconductor device and a magnetic material. The smallest unit of storage in memory is a bistable semiconductor circuit or a CMOS transistor or magnetic material storage element, which can store a binary code; a memory element is generally called 1Bit; a memory cell is composed of several memory elements; A storage unit composed of 8 storage elements can store 8 binary codes, generally referred to as 1 Byte (bytes); a memory is composed of a plurality of storage units. A memory contains a number of memory locations, each of which can hold one byte. Each memory location has a number, the address, which is usually expressed in hexadecimal. The sum of data that all memory cells in a memory can hold is called its storage capacity. Assuming that the address code of a memory consists of a 20-bit binary number (ie, a 5-digit hexadecimal number), it can represent 220, that is, 1 MBIT memory cell addresses. If each storage unit stores one byte, the storage capacity of the storage is 1 MByte.

When describing the memory capacity in the mobile phone industry, the mentioned 512M+256M means 512MBit+256MBit, if it is to be converted into Byte, it is 64MByte+32MByte.

memory.jpg


Composition of Memory

The storage medium constituting the memory is mainly a semiconductor device and a magnetic material. The smallest unit of storage in memory is a bistable semiconductor circuit or a CMOS transistor or magnetic material storage element that stores a binary code. A storage unit is composed of a plurality of storage units, and then a storage unit is composed of a plurality of storage units. A memory contains a number of memory locations, each of which can hold one byte. Each memory location has a number, the address, which is usually expressed in hexadecimal. The sum of data that all memory cells in a memory can hold is called its storage capacity. Assuming that the address code of a memory consists of a 20-bit binary number (ie, a 5-digit hexadecimal number), it can represent 220, that is, 1M memory cell addresses. Each memory unit stores one byte, and the memory has a storage capacity of 1 KB.


Classification of Memory

Classification by Read-write Function of Memory 

ROMThe stored content is a fixed, semiconductor memory that can only be read but not written.

Read-Only Memory is a separate internal memory used to store and store permanent data. ROM data cannot be updated arbitrarily, but can be read at any time. Even if the power is turned off, the ROM can retain data. Therefore, it also belongs to non-volatile memory

Injecting data into the ROM requires an additional compiler, which is not available on the PC. Generally, the information is injected before the ROM is shipped from the factory. The content is not changed without special circumstances, which means that it is usually the same content for a lifetime.

One of the misunderstandings in PCs is that people often confuse ROM with HardDisk, which belongs to external storage.

ROM


Random Read-Write Memory (RAM): A semiconductor memory that can read and write.

Memory is where programs and data are stored. For example, when we use WPS to process a document, when you type a character on the keyboard, it is stored in memory. When you choose to save the file, the data in the memory will be Store in a hard (magnetic) disk.

RAM can read data from and write data. When the machine is powered off, the data stored in it is lost. Therefore, it is also a volatile memory.

Random Read-Write Memory.jpg


Dynamic random access memory is the most common system memory. DRAM can only keep data for a short time. In order to maintain data, DRAM must be refreshed at intervals. If the storage unit is not refreshed, the data will be lost.

The specific working process of DRAM is as follows: whether a DRAM memory cell stores 0 or 1 depends on whether the capacitor has a charge, a charge representing 1 and no charge representing 0. But for a long time, the capacitor representing 1 will discharge, and the capacitor representing 0 will absorb the charge, which is the reason for data loss; the refresh operation periodically checks the capacitor. If the power is greater than 1/2 of the full charge, it is considered to be 1 And fully charge the capacitor; if the charge is less than 1/2, it is considered to represent 0, and the capacitor is discharged, thereby maintaining data continuity.

DRAM uses the charge on the gate capacitance of the MOS transistor to store information. Once the power-down information is lost, the gate will leak, so a refreshing mechanism is needed to recharge the gate capacitors at regular intervals, and each read. After the data is once again, it needs to be replenished. This is called dynamic refresh, so it is called dynamic random access memory. Since it uses only one MOS tube to store information, the integration can be high and the capacity can be made very large. SDRAM has one more synchronization with the CPU clock.


Synchronous dynamic random access memory. The current 168-line 64-bit bandwidth memory basically uses SDRAM chips, the operating voltage is 3.3V, the access speed is up to 7.5ns, and the EDO memory is 15ns. The RAM and the CPU are controlled at the same clock frequency to synchronize the RAM with the CPU FSB and cancel the waiting time. So its transfer rate is faster than EDO DRAM.

SRAM is an abbreviation of English Static RAM, called static random access memory. It is a kind of memory with static access function, which can save the data stored in it without refreshing the circuit. Unlike DRAM memory, which needs to refresh the circuit, SRAM has higher performance, but SRAM also has its disadvantages, that is, its integration is low, the same capacity of DRAM memory can be designed to be smaller, but SRAM needs to be very Large volume.


Advantages and disadvantages of DRAM and SRAM

SRAM relies on a flip-flop to memorize information; DRAM relies on the gate capacitance in a MOS circuit to store information. Since the charge on the capacitor will leak, it needs to be supplemented periodically, so the DRAM needs to set the refresh circuit. However, DRAM has higher integration than SRAM, low power consumption, and low cost, and is suitable for large-capacity memory.

The advantage of SRAM is that it is fast and does not have to cooperate with the memory refresh circuit to improve the overall working efficiency.

The disadvantage is that the integration is low, the power consumption is large, the same capacity is large, and the price is high, and a small amount is used in critical systems to improve efficiency.

PSRAM has a single-transistor DRAM cell that is quite different from a traditional six-transistor SRAM cell or four-transistor two-load resistor SRAM, but has a stable SRAM-like interface and an internal DRAM architecture. Give PSRAM some advantages over low-power 6T SRAM, such as being lighter and more competitive. Currently, 90% of manufacturers in the overall SRAM market are producing PSRAM components. In the past two years, important SRAM/PSRAM suppliers on the market include Samsung, Cypress, Renesas, Micron and Toshiba.

PSRAM is a pseudo SRAM. The internal memory particles are similar to the SDRAM particles, but the external interface is similar to SRAM. It does not require a complicated controller and refresh mechanism like SDRAM. The interface of PSRAM is the same as the interface of SRAM.

PSRAM capacity is 8Mbit, 16Mbit, 32Mbit, etc. The capacity is not as high as SDRAM, but it is definitely much higher than the capacity of SRAM. The speed supports burst mode, not very slow, Hynix, Coremagic, WINBOND.MICRON. CY And other manufacturers have to supply, the price is only slightly more expensive than the same capacity SDRAM, much cheaper than SRAM.

In short, the reason why PSRAM is pseudo-SRAM is because it shows the main performance, such as: no need to refresh the circuit, interface and so on and SRAM, but the internal architecture is the same as DRAM.

PSRAM is mainly used in mobile phones, electronic dictionaries, PDAs, PDAs, PMP.MP3/4, GPS receivers and other consumer electronics products. Compared with SRAM, PSRAM is smaller in size. At the same time, PSRAM I/O interface is the same as SRAM. In terms of capacity, currently 4MB, 8MB, 16MB, 32MB, 64MB and 128MB. Compared to SDRAM, PSRAM consumes much less power. So it is an ideal choice for many portable products that require a certain amount of cache capacity.

NOR (Non-OR) is the main non-volatile flash technology on the market today.

NOR is generally only used to store a small amount of code; NOR is mainly used in code storage media. NOR is characterized by simple application, no need for special interface circuit, high transmission efficiency, it belongs to in-chip execution (XIP, eXecute In Place), so that the application can run directly in the (NOR) flash memory, no need to put the code Read into system RAM. It is cost-effective at small capacities of 1 to 4 MB, but the low write and erase speeds greatly affect its performance. The NOR flash has an SRAM interface with enough address pins to address and easy access to every byte in its internals. NOR flash occupies most of the 1 to 16MB flash memory market.

At present, most mobile phones use NORFLASH to implement code storage, while using SRAM or PSRAM as cache or working memory, while NANDFLASH manufacturers advocate combining NANDFLASH with SDRAM.

The storage speed of the RAM chip is faster than that of the ROM chip.


Classification by Preservability of Information 

Non-permanent memory: The memory disappears after the Volatile Memory is powered off. For example: SRAM

Permanent memory: A memory that retains information after the Non-Volatile Memory is powered off. For example: ROM

There are two types of SRAM, one is called Static RAM (SRAM). SRAM is very fast. It is the fastest storage device for reading and writing, but it is also very expensive. The other is called dynamic RAM (Dynamic). RAM/DRAM), DRAM retains data for a short period of time and is slower than SRAM, but it is faster than any ROM, but DRAM is cheaper than SRAM in terms of price.

There are many types of DRAM, and the main ones are FPRAM/FastPage, EDORAM, SDRAM, DDR RAM, RDRAM, SGRAM, and WRAM.


Programmable Read Only Memory, also known as One-Time Programmable (OTP) ROM, is a read-only memory that can be manipulated by a program. The main feature is that only data is allowed to be written once, and data can only be scrapped if it is burned. It is basically not applied at present.

The EPROM (Erasable Programmable ROM) chip can be repeatedly erased and written, which solves the drawback that the PROM chip can only be written once. The EPROM chip has a very obvious feature. On the ceramic package on the front side, a glass window is opened through which the integrated circuit can be seen. The ultraviolet light can be erased through the hole to illuminate the internal chip. The internal data, the EPROM eraser is used to complete the chip erase operation. The data in the EPROM is written with a dedicated programmer, and a certain programming voltage must be added to the contents of the chip. After writing the data, the EPROM chip also seals the window with an opaque sticker or tape to protect the data from the surrounding ultraviolet rays.

The EEPROM can erase existing information and reprogram it on a computer or on a dedicated device. Generally used in plug and play. The EEPROM (Electrically Erasable Programmable Read Only Memory) is a user-readable read-only memory (ROM) that can be erased and reprogrammed (overwritten) by acting above a normal voltage. Unlike the EPROM chip, the EEPROM can be modified without being removed from the computer. In an EEPROM, the life of the EEPROM is an important design consideration when the computer is frequently reprogrammed when in use. A special form of EEPROM is flash memory, the application of which is typically the voltage in a personal computer to erase and reprogram. The price is very high, the writing time is very long, and the writing is very slow. For example, the mobile phone software is usually placed in the EEPROM, we call, some of the last number dialed, temporarily stored in the SRAM, not immediately written through the record (the call record is saved in the EEPROM), because there is a very important job at the time (Call) To do, if written, the long wait is for the user to endure.

FLASH memory, also known as flash memory, combines the advantages of ROM and RAM, not only with electronically erasable programmable (EEPROM) performance, but also does not power off data and can quickly read data (NVRAM advantage), U disk This memory is used in MP3. In the past 20 years, embedded systems have used ROM (EPROM) as their storage device. However, in recent years, Flash has completely replaced the position of ROM (EPROM) in embedded systems, as a storage bootloader and operating system or program. The code is used directly by the hard disk (U disk).


Currently Flash has two main types of NOR Flash and NADN Flash.

NOR (Non-or) NOR gate; or logic is when any input, A or B, or both, when logic 1, the output is logic 1.

Or the meaning of "or non-", that is, "right or negated". The function of the right or wrong is obtained by negating the result of the function or the function. Therefore, if the logical output is 1, or the logic is 0, it becomes 0. , or the logic output is 0, or the non-logic is changed to 1. This gives the NOR gate.

The reading of NOR Flash is the same as the reading of our common SDRAM. Users can directly run the code loaded in NOR FLASH, which can reduce the capacity of SRAM and save costs.

NAND Flash does not take random reading technology of memory. Its reading is performed in the form of reading one block at a time, usually reading 512 bytes at a time. Flash using this technology is relatively cheap. Users can't run the code directly on NAND Flash, so many NAND Flash development boards use a small NOR Flash to run the boot code in addition to NAND Flah.

Generally, NOR Flash is used for small capacity. Because it is fast, it is used to store important information such as operating system. For large-capacity NAND FLASH, the most common NAND FLASH application is DOC (Disk On Chip) used in embedded systems. And the "flash disk" we usually use, can be erased online. Currently, FLASH is mainly from Intel, AMD, Fujitsu and Toshiba, while the main manufacturers of NAND Flash are Samsung and Toshiba.


Comparison of NAND Flash and NOR Flash

NOR and NAND are the two main non-volatile flash technologies on the market today. Intel first developed NOR flash technology in 1988, completely changing the situation that was originally dominated by EPROM and EEPROM. Then, in 1989, Toshiba announced a NAND flash architecture that emphasizes lower cost per bit, higher performance, and can be easily upgraded via the interface like a disk. But after more than a decade, there are still quite a few hardware engineers who can't distinguish between NOR and NAND flash.

"flash memory" can often be used interchangeably with phase "NOR memory". Many in the industry are also confused about the advantages of NAND flash technology over NOR technology, because in most cases flash is only used to store a small amount of code, then NOR flash is more suitable. NAND is the ideal solution for high data storage density.

NOR is the main non-volatile flash technology on the market today. NOR is generally only used to store a small amount of code; NOR is mainly used in code storage media. NOR is characterized by simple application, no need for special interface circuit, high transmission efficiency, it belongs to in-chip execution (XIP, eXecute In Place), so that the application can run directly in the (NOR) flash memory, no need to put the code Read into system RAM. It is cost-effective at small capacities of 1 to 4 MB, but the low write and erase speeds greatly affect its performance. The NOR flash has an SRAM interface with enough address pins to address and easy access to every byte in its internals. NOR flash occupies most of the 1 to 16MB flash memory market.

The NAND structure provides extremely high cell density, high memory density, and fast write and erase speeds. The difficulty in applying NAND lies in the management of flash and the need for special system interfaces.


1, Performance Comparison

Flash flash memory is a non-volatile memory that can be erased and reprogrammed for blocks of memory cells called blocks. Any flash device write operation can only be done in empty or erased cells, so in most cases, the erase must be performed before the write operation. It is quite simple for a NAND device to perform an erase operation, while NOR requires that all bits in the target block be written as 1 before erasing.

Since the erasing of the NOR device is performed in blocks of 64 to 128 KB, the time for performing a write/erase operation is 5 s. In contrast, the erase NAND device is performed in blocks of 8 to 32 KB, and the same is performed. The operation only takes up to 4ms.

The difference in block size when performing an erase further widens the performance gap between NOR and NADN. Statistics show that for a given set of write operations (especially when updating small files), more erase operations must be performed. Performed in a NOR-based unit. Thus, when choosing a storage solution, the designer must weigh the following factors:

● NOR reads faster than NAND.

● NAND write speed is much faster than NOR.

● NAND's 4ms erase speed is much faster than NOR's 5s.

● Most write operations require an erase operation first.

● The NAND erase unit is smaller and the corresponding erase circuit is less.

(Note: NOR FLASH SECTOR erasure time varies by brand and size. For example, 4M FLASH, some SECTOR erasure time is 60ms, and some need up to 6s.)


2, Interface Differences

The NOR flash has an SRAM interface with enough address pins to address and easy access to every byte in its internals.

NAND devices use complex I/O ports to serially access data, and the methods of individual products or vendors may vary. Eight pins are used to transfer control, address and data information.

NAND read and write operations use 512-byte blocks, which is a bit like hard disk management. Naturally, NAND-based memory can replace hard drives or other block devices.


3. Capacity and Cost

The cell size of NAND flash is almost half that of NOR devices. Due to the simpler production process, the NAND structure can provide higher capacity within a given die size, which in turn reduces the price.

NOR flash occupies most of the 1 to 16MB flash memory market, while NAND flash is only used in 8-128MB products. This also shows that NOR is mainly used in code storage media, NAND is suitable for data storage, and NAND is in CompactFlash. Secure Digital, PC Cards and MMC memory cards account for the largest share of the market.


4. Reliability and Durability

One important consideration when using flahs media is reliability. For systems that need to extend MTBF, Flash is a very suitable storage solution. The reliability of NOR and NAND can be compared in terms of lifetime (durability), bit swapping, and bad block processing.

A) Life (Durability)

The maximum number of erasures per block in NAND flash is one million, while the number of NOR erases is 100,000. In addition to having a 10 to 1 block erase cycle advantage, a typical NAND block size is eight times smaller than a NOR device, and each NAND memory block has fewer deletes in a given amount of time.

B) Bit Swapping

All flash devices suffer from bit swapping. In some cases (rarely, NAND occurs more often than NOR), a bit bit is inverted or reported to be inverted.

A single change may not be obvious, but if it occurs on a critical file, this small failure can cause the system to shut down. If you only have a problem with the report, you may solve it by reading it a few more times.

Of course, if this bit really changes, you must use the Error Detection/Error Correction (EDC/ECC) algorithm. The problem of bit reversal is more common in NAND flash, where NAND vendors recommend using EDC/ECC algorithms when using NAND flash.

This problem is not fatal when storing multimedia information with NAND. Of course, if you use a local storage device to store operating systems, configuration files, or other sensitive information, you must use an EDC/ECC system to ensure reliability.

C) Bad Block Processing

Bad blocks in NAND devices are randomly distributed. In the past, there have been efforts to eliminate bad blocks, but found that the yield is too low, the cost is too high, it is not cost-effective.

NAND devices require an initial scan of the media to find bad blocks and mark bad blocks as unavailable. In a fabricated device, if this process cannot be performed by a reliable method, it will result in a high failure rate.


5, Easy to Use

You can use NOR-based flash memory very directly, you can connect like other memories, and you can run code directly on it.

NAND is much more complicated due to the need for an I/O interface. Access methods for various NAND devices vary from manufacturer to manufacturer.

When using a NAND device, the driver must be written before proceeding with other operations. Writing information to a NAND device requires considerable skill, because the designer must never write to bad blocks, which means that virtual mapping must be done from start to finish on the NAND device.


6. Software Support

When discussing software support, you should distinguish between basic read/write/erase operations and a higher level of software for disk emulation and flash management algorithms, including performance optimization.

No software support is required to run code on a NOR device. When doing the same on a NAND device, a driver, usually a memory technology driver (MTD), is used for NAND and NOR devices during write and erase operations. Both need MTD.

The driver is also used for emulation of DiskOnChip products and management of NAND flash, including error correction, bad block processing and wear leveling.

NOR FLASH's main suppliers are INTEL, MICRO and other manufacturers. It used to be the mainstream product of FLASH, but now it is more uncomfortable to be squeezed by NAND FLASH. Its advantage is that it can run programs directly from FLASH, but the process is complicated and the price is more expensive.

The main suppliers of NAND FLASH are SAMSUNG and Toshiba. These FLASHs are in U disk, various memory cards and MP3 players. Due to different processes, it has more storage capacity than NOR FLASH and is cheaper. But there are also disadvantages, that is, the program cannot be directly run, and only data can be stored. In addition, NAND FLASH is very prone to bad areas, so a verification algorithm is needed.

Use NAND FLASH to store data and programs on your handheld, but you must have NOR FLASH to boot. In addition to the SAMSUNG processor, other mainstream processors used in handheld computers do not support direct startup from NAND FLASH. Therefore, you must start the machine with a small NOR FLASH, and run the software such as OS into the SDRAM from NAND FLASH. It is very troublesome.

SRAM uses registers to store information, so once power is lost, the data will be lost. As long as the power is supplied, its data will always exist. It does not need dynamic refresh, so it is called static random access memory.

The Flash ROM uses the capacitance on the floating gate to store the charge to save the information. Because the floating gate does not leak, the information can still be saved after the power is turned off. Also because of its simple structure, the integration can be done very high and the capacity can be large. Before the Flash rom is written, it needs to be erased by power, and the erase and the EEPROM can be performed in units of bytes. The flash rom can only be performed in units of sectors. However, it can be written in bytes. The flash rom is mainly used for devices such as bios, U disk, Mp3, etc. that require large capacity and no power loss.


Basic Principles 

Flash memory is a long-lived non-volatile memory that retains stored data information in the event of a power outage. Data deletion is not in a single byte but in a fixed block. The block size is typically 256KB to 20MB. Flash memory is a variant of electronically erasable read-only memory (EEPROM). Unlike EEPROM, EEPROM can delete and rewrite at the byte level instead of the entire chip, so flash is faster than EEPROM. . Since data can still be saved when it is powered off, flash memory is often used to save setup information, such as saving data in a computer's BIOS (basic input and output program), PDA (personal digital assistant), digital camera, and so on. On the other hand, flash memory does not rewrite data in units of bytes like RAM (random access memory), so it cannot replace RAM.

Flash Card (Flash Card) is a memory that uses flash memory technology to store electronic information. It is generally used as a storage medium in small digital products such as digital cameras, PDAs, and MP3s, so it looks like a card, so it is like a card. Call it a flash card.

memory


Technology and Characteristics 

NOR type and NAND type flash memory are very different. For example, NOR type flash memory is more like memory, has independent address line and data line, but the price is more expensive, the capacity is smaller; and NAND type is more like hard disk, address line The data line is a shared I/O line. All information like a hard disk is transmitted through a hard disk line. The NAND type has a lower cost and a much larger capacity than the NOR type flash memory. Therefore, NOR flash memory is more suitable for frequent random read and write occasions, usually used to store program code and run directly in flash memory. Mobile phones are large users of NOR flash memory, so the "memory" capacity of mobile phones is usually small; NAND flash memory Mainly used to store data, our commonly used flash memory products, such as flash drives and digital memory cards, use NAND flash memory.


NAND Flash Memory

The basic storage unit of the memory and NOR type flash memory is bit, and the user can randomly access information of any bit. The basic storage unit of the NAND flash memory is a page (it can be seen that the page of the NAND flash memory is similar to the sector of the hard disk, and one sector of the hard disk is also 512 bytes). The effective capacity of each page is a multiple of 512 bytes. The so-called effective capacity refers to the part used for data storage, and actually adds 16 bytes of parity information, so we can see the "(512+16)Byte" representation in the flash manufacturer's technical data. . At present, the majority of NAND-type flash memories with capacities below 2Gb are (512+16) bytes of page capacity, and NAND-type flash memories with capacities of more than 2Gb expand the page capacity to (2048+64) bytes.

The NAND type flash memory performs an erase operation in units of blocks. The write operation of the flash memory must be performed in a blank area. If the target area already has data, it must be erased and then written, so the erase operation is the basic operation of the flash memory. Generally, each block contains 32 512-byte pages with a capacity of 16 KB. When the large-capacity flash memory uses 2 KB pages, each block contains 64 pages and has a capacity of 128 KB.

The I/O interface of each NAND flash memory is generally eight, each data line transmits (512 + 16) bits of information each time, and eight are (512 + 16) × 8 bits, which is 512 bytes as mentioned above. However, the larger capacity NAND flash memory is also increasingly using 16 I/O lines. For example, the Samsung K9K1G16U0A chip is a 64M×16bit NAND flash memory with a capacity of 1Gb and the basic data unit is (256+8). ) × 16bit, or 512 bytes.

When addressing, the NAND flash memory transfers address packets through eight I/O interface data lines, each of which carries 8-bit address information. Since the capacity of the flash chip is relatively large, a group of 8-bit addresses can only address 256 pages, which is obviously not enough. Therefore, usually one address transfer needs to be divided into several groups and takes several clock cycles. The address information of the NAND includes the column address (the initial operation address in the page), the block address, and the corresponding page address, and are respectively grouped at the time of transmission, and it takes at least three times and takes three cycles. As the capacity increases, the address information will be more and it takes more clock cycles to transmit. Therefore, an important feature of the NAND flash memory is that the larger the capacity, the longer the addressing time. Moreover, since the transfer address period is longer than other storage media, NAND-type flash memory is less suitable for a large number of small-capacity read-write requests than other storage media.


What Are the Determinants of NAND Flash? 

1. Number of Pages

As mentioned earlier, the larger the page of the larger capacity flash, the larger the page, the longer the addressing time. But the extension of this time is not a linear relationship, but a step by step. For example, a 128, 256 Mb chip requires 3 cycles to transmit an address signal, 512 Mb, 1 Gb requires 4 cycles, and 2, 4 Gb requires 5 cycles.


2. Page Capacity

The capacity of each page determines the amount of data that can be transferred at a time, so large-capacity pages have better performance. As mentioned earlier, large-capacity flash (4Gb) increases the page capacity from 512 bytes to 2KB. The increase in page capacity not only makes it easier to increase capacity, but also improves transmission performance. We can give an example. Take Samsung K9K1G08U0M and K9K4G08U0M as examples. The former is 1Gb, 512-byte page capacity, random read (stable) time is 12μs, write time is 200μs; the latter is 4Gb, 2KB page capacity, random read (stability) time 25μs, write time It is 300μs. Suppose they work at 20MHz.

Read performance: The read steps of NAND flash memory are divided into: send command and addressing information → transfer data to page register (random read stable time) → data outgoing (8bit per cycle, need to transmit 512+16 or 2K+ 64 times).

K9K1G08U0M read a page needs: 5 commands, addressing cycle × 50ns + 12μs + (512 + 16) × 50ns = 38.7μs; K9K1G08U0M actual read transfer rate: 512 bytes ÷ 38.7μs = 13.2MB / s; K9K4G08U0M read a page Requires: 6 commands, addressing period × 50ns + 25μs + (2K + 64) × 50ns = 131.1μs; K9K4G08U0M actual read transfer rate: 2KB bytes ÷ 131.1μs = 15.6MB / s. Therefore, using a 2KB page capacity to 512 bytes also increases the read performance by about 20%.

Write performance: The write steps of the NAND flash memory are divided into: sending addressing information → transferring data to the page register → sending command information → data is written from the register to the page. The command cycle is also one. We will merge it with the address cycle below, but the two parts are not continuous.

K9K1G08U0M writes a page: 5 commands, addressing period × 50ns + (512 + 16) × 50ns + 200μs = 226.7μs. K9K1G08U0M actual write transfer rate: 512 bytes ÷ 226.7μs = 2.2MB / s. K9K4G08U0M writes a page: 6 commands, addressing period × 50ns + (2K + 64) × 50ns + 300μs = 405.9μs. K9K4G08U0M actual write transfer rate: 2112 bytes / 405.9 μs = 5MB / s. Therefore, using 2KB page capacity increases write performance by more than twice the 512-byte page capacity.


3. Block Capacity

The block is the basic unit of the erase operation. Since the erase time of each block is almost the same (the erase operation generally takes 2ms, and the time occupied by the command and address information of several previous cycles is negligible), the capacity of the block will be directly determined. Erase performance. The page capacity of the large-capacity NAND-type flash memory is increased, and the number of pages per block is also improved. Generally, the block capacity of the 4Gb chip is 2 KB × 64 pages = 128 KB, and the 1 Gb chip is 512 bytes × 32 pages = 16 KB. It can be seen that within the same time, the former's rubbing speed is 8 times that of the latter.


4. I/O Bit Width

In the past, the data lines of NAND-type flash memories were generally eight, but from the 256Mb products, there were 16 data lines. However, due to the controller and other reasons, the actual application of the x16 chip is relatively small, but the number will still increase in the future. Although the x16 chip still uses 8-bit groups when transmitting data and address information, the cycle is unchanged, but the data is transmitted in 16-bit groups and the bandwidth is doubled. The K9K4G16U0M is a typical 64M×16 chip, which is still 2KB per page, but the structure is (1K+32)×16bit.

Imitate the above calculations, we get the following. K9K4G16U0M needs to read one page: 6 commands, address period × 50ns + 25μs + (1K + 32) × 50ns = 78.1μs. K9K4G16U0M actual read transfer rate: 2KB bytes ÷ 78.1μs = 26.2MB / s. K9K4G16U0M writes a page: 6 commands, addressing period × 50ns + (1K + 32) × 50ns + 300μs = 353.1μs. K9K4G16U0M actual write transfer rate: 2KB bytes ÷ 353.1μs = 5.8MB / s

It can be seen that with the same capacity of the chip, after the data line is increased to 16 lines, the read performance is improved by nearly 70%, and the write performance is also improved by 16%.


5. Frequency

The impact of the working frequency is easy to understand. The operating frequency of NAND flash memory is 20 to 33 MHz, and the higher the frequency, the better the performance. In the case of K9K4G08U0M, we assume that the frequency is 20MHz. If we double the frequency to 40MHz, then K9K4G08U0M needs to read one page: 6 commands, addressing period × 25ns + 25μs + (2K + 64) × 25ns = 78μs. K9K4G08U0M actual read transfer rate: 2KB bytes ÷ 78μs = 26.3MB / s. It can be seen that if the operating frequency of the K9K4G08U0M is increased from 20MHz to 40MHz, the read performance can be improved by nearly 70%! Of course, the above example is just for convenience. In Samsung's actual product line, the K9XXG08UXM, rather than the K9XXG08U0M, can work at higher frequencies. The former frequency is currently up to 33MHz.


6. Manufacturing Process

Manufacturing processes can affect the density of transistors and also have an impact on the timing of some operations. For example, the write stabilization and read settling times mentioned above take up a significant portion of the time in our calculations, especially when writing. If you can reduce these times, you can further improve performance. Can the 90nm manufacturing process improve performance? I am afraid the answer is no! The current situation is that as the storage density increases, the required read and write settling time is on the rise. This trend is reflected in the examples given in the previous calculations, otherwise the performance improvement of the 4Gb chip is more obvious.

On the whole, the large-capacity NAND-type flash memory chip will have a slightly longer addressing and operation time, but as the page capacity increases, the effective transmission rate will still be larger. The large-capacity chip meets the market's capacity, cost and performance. Demand trends. Increasing the data line and increasing the frequency is the most effective way to improve performance, but they will not be affected by the process and address factors, such as command and address information, and some fixed operating time (such as signal stabilization time). Bringing year-on-year performance improvements.


Memory Applications in Mobile Phones

The suppliers of mobile phone memory are divided into two categories or two camps, one is the Intel series, which includes Intel, ST, Sharp; the other is the AMD series, which includes Samsung, SST, Spansion, Toshiba.

The reason why it is called two camps is because the hardware products of different manufacturers in the same camp have hardware PIN2PIN and the running software is relatively consistent. We can find alternative materials or second among the memory manufacturers in the same camp in actual use. Suppliers; products that are not in the same camp vary greatly from structure to software, and cannot be easily interchanged;

In NOR, it is divided into a non-erasable area for storing code and a user space for storing files; generally, the non-erasable area is relatively large;

The storage capacity used is different according to the platform, as follows:

Dragon Fly: 512M+128M; 256M+64M; 128M+32M

Sysol me: 256M+64M; 128M+32M; 64M+16M; 32M+8M; 32M+4M

Si1icon Lab: 128M+32M; 64M+16M; 32M+8M;

memory


Memory Characteristics 

Memory: A device that stores programs and data

Storage bit: A storage unit that stores a binary digit, which is the smallest storage unit of memory, or memory unit.

Memory word: a number (n-bit binary bit) stored or deleted as a whole, called a memory word

Storage unit: a plurality of memory units storing a storage word to form a storage unit

Bank: A collection of a large number of storage units

Storage unit address: the number of the storage unit

Word Addressing: Word Addressing Memory Units

Byte addressing: Byte addressing of a memory location

Addressing: Find data by address and fetch data from the storage unit of the corresponding address.


Memory Applications 

Depending on the role of the memory in the computer system, it can be divided into a main memory, a secondary memory, a cache memory, a control memory, and the like.

In order to solve the contradiction between the large capacity, high speed and low cost of the memory, a multi-level memory architecture is generally adopted, that is, a cache memory, a main memory and an external memory are used.

Storage system hierarchy

Storage system hierarchy

Use characteristics.

Cache Cache high-speed access instructions and data access speed, but storage capacity is small.

The main memory memory stores a large number of programs and data access speeds during computer operation, and the storage capacity is not large.

The external memory storage system program and large data files and database storage capacity are large, and the bit cost is low.


Memory Principle 

When writing to the dynamic memory, the row address first latches the RAS in the chip, then the column address latches the CAS in the chip, WE is valid, and the data is written, and the written data is stored in the specified unit. .

When the dynamic memory is read, the CPU first outputs the RAS latch signal, obtains the row address of the data storage unit, and then outputs the CAS latch signal to obtain the column address of the data storage unit, and keeps WE=1, which can be known. The data in the storage unit of the row and column address is read out.

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